NXP Semiconductors MPC5606S - User Multiple Input Signature Register 4 (UMISR4)

Flash Memory
MPC5606S Microcontroller Reference Manual, Rev. 7
622 Freescale Semiconductor
17.3.6.18 User Multiple Input Signature Register 4 (UMISR4)
The Multiple Input Signature Register provides a mean to evaluate the Array Integrity.
The User Multiple Input Signature Register 4 represents the ECC bits of the whole 144 bits word (2 Double
Words including ECC): bits 8-15 are ECC bits for the odd Double Word and bits 24-31 are the ECC bits
for the even Double Word; bits 4-5 and 20-21 of MISR are respectively the double and single ECC error
detection for odd and even Double Word.
The UMISR4 Register is not accessible whenever MCR.DONE or UT0.AID are low: reading returns
indeterminate data while writing has no effect.
17.3.7 Programming considerations
17.3.7.1 Modify operation
All the Modify operations of the flash module are managed through the flash memory user registers
interface.
All the sectors of the flash module belong to the same partition (Bank), therefore when a Modify operation
is active on some sectors no read access is possible on any other sector (Read-While-Modify is not
supported).
Address Offset: 0x00058 Reset value: 0x00000000
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
MS15
9
MS15
8
MS15
7
MS15
6
MS15
5
MS15
4
MS15
3
MS15
2
MS15
1
MS15
0
MS14
9
MS14
8
MS14
7
MS14
6
MS14
5
MS14
4
rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
MS14
3
MS14
2
MS14
1
MS14
0
MS13
9
MS13
8
MS13
7
MS13
6
MS13
5
MS13
4
MS13
3
MS13
2
MS13
1
MS13
0
MS12
9
MS12
8
rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0 rw/0
Figure 17-41. User Multiple Input Signature Register 4 (UMISR4)
Table 17-58. UMISR4 field descriptions
Field Description
0:31 MS159-128: Multiple input Signature 159-128 (Read/Write)
These bits represent the MISR value obtained accumulating:
the 8 ECC bits for the even Double Word (on MS135-128);
the single ECC error detection for even Double Word (on MS138);
the double ECC error detection for even Double Word (on MS139);
the 8 ECC bits for the odd Double Word (on MS151-144);
the single ECC error detection for odd Double Word (on MS154);
the double ECC error detection for odd Double Word (on MS155).
The MS can be seeded to any value by writing the UMISR4 register.