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NXP Semiconductors MPC5606S - Introduction

NXP Semiconductors MPC5606S
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Configurable Enhanced Modular IO Subsystem (eMIOS200)
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 237
9.2 Introduction
Figure 9-4 shows the block diagram of the configurable eMIOS200 block.
Address Base + 0x0000 Access: Read/Write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
0 0 0 0 0 0 0 0 0
MODE[0:6]
W
Figure 9-3. Channel mode selection field
Table 9-4. Channel mode selection field description
Field Description
bit 25:31
MODE[25:31
]
The MODE[0:6] bits select the channel mode operation, as shown in Tabl e 9-5.
Table 9-5. Channel mode selection
MODE[0:6]
1
1
b = adjust parameters for the mode of operation. Refer to Section 9.5.1.1, UC modes of operation, for details.
Mode of operation
0000000 General Purpose Input/Output mode (input)
0000001 General Purpose Input/Output mode (output)
0000010 Single Action Input Capture
0000011 Single Action Output Compare
0000100
to
1001111
Reserved
101000b Modulus Counter Buffered (Up counter)
1010010 Reserved
10101bb Modulus Counter Buffered (Up/Down counter)
10110b0 Output Pulse Width and Frequency Modulation Buffered
10110b1
to
10111b1
Reserved
11000b0 Output Pulse Width Modulation Buffered
1100001
to
1111111
Reserved

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