NXP Semiconductors MPC5606S - Introduction

Periodic Interrupt Timer (PIT)
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 973
Chapter 27 
Periodic Interrupt Timer (PIT)
27.1 Introduction
27.1.1 Overview
The PIT is an array of timers that can be used to raise interrupts and trigger DMA channels.
This device has one PIT module with four Timer Channels (PIT channels 0 through 3). These are
connected to the Trigger input 0 through 3 of the DMA MUX.
Figure 27-1 shows the PIT block diagram.
Figure 27-1. PIT block diagram
27.1.2 Features
The main features of this block are:
• Timers can generate DMA trigger pulses
• Timers can generate interrupts
• All interrupts are maskable
Timer 3
Timer 0
.
.
.
PIT
Registers
Peripheral
interrupts
Peripheral
PIT
.
.
.
triggers
Bus
Bus Clock