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NXP Semiconductors MPC5606S - Peripheral Clocks Disable

NXP Semiconductors MPC5606S
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Mode Entry Module (MC_ME)
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 941
25.4.3.3 Peripheral Clocks Disable
On completion of the Target mode request, the MC_ME requests each peripheral to enter its stop mode
when:
The peripheral is configured to be disabled via the target mode, the peripheral configuration
registers ME_RUN_PC0…7 and ME_LP_PC0…7, and the peripheral control registers
ME_PCTL0…143
WARNING
The MC_ME does not automatically request peripherals to enter their stop
modes if the power domains in which they are residing are to be turned off
due to a mode change. Therefore, it is software’s responsibility to ensure
that those peripherals that are to be powered down are configured in the
MC_ME to be frozen.
Each peripheral acknowledges its stop mode request after closing its internal activity. The MC_ME then
disables the corresponding clock(s) to this peripheral.
In the case of a Safe mode transition request, the MC_ME does not wait for the peripherals to acknowledge
the stop requests. The Safe mode clock gating configuration is applied immediately regardless of the status
of the peripherals’ stop acknowledges.
Please refer to Section 25.4.6, Peripheral clock gating for more details.
Each peripheral that may block or disrupt a communication bus to which it is connected ensures that these
outputs are forced to a safe or recessive state when the device enters the Safe mode.
FMPLL1
off off off off off off off off
CFLASH
normal normal normal normal normal low-power power-
down
power-
down
DFLASH
normal normal normal normal normal low-power power-
down
power-
down
MVREG
on on on on on on on off
PDO
off off on off off off off on
Table 25-16. MC_ME resource control overview (continued)
Resource
Mode
Reset Test Safe DRUN Run0…3 Halt Stop Standby

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