Safety
MPC5606S Microcontroller Reference Manual, Rev. 7
120 Freescale Semiconductor
requires periodic execution of a watchdog servicing sequence. Writing the sequence resets the timer to a
specified timeout period. If this servicing action does not occur before the timer expires the SWT generates
an interrupt or hardware reset. The SWT can be configured to generate a reset or interrupt on an initial
timeout, a reset is always generated on a second consecutive timeout.
The SWT provides a window functionality. When this functionality is programmed, the servicing action
should take place within the defined window. When occurring outside the defined period, the SWT will
generate a reset.
4.2.2 Features
The SWT has the following features:
• 32-bit timeout register to set the timeout period
• The unique SWT counter clock is the undivided low-power internal oscillator (IRC 128 khz), no
other clock source can be selected
• Programmable selection of window mode or regular servicing
• Programmable selection of reset or interrupt on an initial timeout
• Master access protection
• Hard and soft configuration lock bits
• The SWT is started on Phase1 exit and counts unconditionally during Phase2 to monitor flash boot
sequence. SWT is held in reset during Phase3 but can start again at Phase3 exit depending on the
value of the shadow flash configuration bit NVUSR0[WATCHDOG_EN].
4.2.3 Modes of operation
When enabled, the SWT is always active in all modes except Standby when it is always disabled.
To simplify software development it is possible to temporarily suspend the SWT counter while the MCU
is stopped by a debugger. While the MCU is running the SWT counter runs normally. This feature is
enabled by setting the SWT_CR[FRZ] bit and is only available when the CPU has debug mode active (see
the CPU reference manual for more information on debug mode and support).
Software watchdog is not available in Standby mode. As soon as out of Standby mode, the SWT behaves
as in a usual “out of reset” situation.
Figure 4-11 shows the operation timing diagram of the SWT. Table 4-5 describes the SWT operation after
reset.
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