Flash Memory
MPC5606S Microcontroller Reference Manual, Rev. 7
552 Freescale Semiconductor
The default state of the flash module is read.
The main, shadow and test address space can be read only in the read state.
The flash memory registers are always available for read, also when the module is in power-down mode
(except few documented registers).
The flash module enters the read state on reset.
The Module is in the read state under two sets of conditions:
• The read state is active when the Module is enabled (User mode read)
• The read state is active when MCR.ERS and MCR.ESUS are high and MCR.PGM is low (Erase
Suspend).
Notice that no Read-While-Modify is available.
Flash core reads return 128 bits (1 page = 2 double words).
Registers reads return 32 bits (1 word).
Flash core reads are done through the Bus Interface Unit.
Registers reads to unmapped register address space will return all 0’s.
Registers writes to unmapped register address space will have no effect.
Array reads attempted to invalid locations will result in indeterminate data. Invalid locations occur when
addressing is done to blocks that do not exist in non 2
n
array sizes.
Interlock writes attempted to invalid locations, will result in an interlock occurring, but attempts to
program these blocks will not occur since they are forced to be locked. Erase will occur to selected and
unlocked blocks even if the interlock write is to an invalid location.
Simultaneous read cycles on the flash matrix and read/write cycles on the registers are possible. On the
contrary, register read/write accesses simultaneous to a flash matrix interlock write are forbidden.
WARNING
Software executing from flash must not write to registers that control flash
behavior, e.g., wait state settings or prefetch enable/disable. Doing so can
cause data corruption. On MPC5606S devices these registers include
PFCR0, BIU1, and BIU2. Further, flash configuration registers should be
written only with 32-bit write operations to avoid any issues associated with
register “incoherency” caused by bit fields spanning smaller size (8- and
16-bit) boundaries.
17.2.5.1 Reset
A reset is the highest priority operation for the flash module and terminates all other operations.
The flash module uses reset to initialize register and status bits to their default reset values.
If the flash module is executing a program or erase operation (MCR.PGM = 1 or MCR.ERS = 1) and a
reset is issued, the operation will be aborted and the module will disable the high voltage logic without
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