NXP Semiconductors MPC5606S - Module Configuration Register (MCR)

Flash Memory
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 555
In the following some non-volatile registers are described. Please notice that such entities are not
Flip-Flops, but locations of Test flash or Shadow blocks with a special meaning.
During the flash memory initialization phase, the FPEC reads these non-volatile registers and updates their
related volatile registers. When the FPEC detects ECC double errors in these special locations, it behaves
in the following way:
• In case of a failing system locations (configurations, device options, redundancy, EmbAlgo
firmware), the initialization phase is interrupted and a fatal error is flagged.
• In case of failing user locations (protections, censorship, BIU, etc.), the volatile registers are filled
with all 1s and the flash memory initialization ends, setting the PEG bit of MCR to 0.
In this section, the following abbreviations are used:
17.2.6.1 Module Configuration Register (MCR)
The Module Configuration Register is used to enable and monitor all the modify operations of the flash
module.
Table 17-7. Abbreviations
Case Abbreviation Description
read/write rw The software can read and write to these bits.
read/clear rc The software can read and clear to these bits.
read-only r The software can only read these bits.
write-only w The software should only write to these bits.
Address Offset: 0x0000 Reset value: 0x0220_0600 (code flash 0)
0x0210_0600 (code flash 1)
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
EDC 0 0 0 0
SIZE
2
SIZE
1
SIZE
0
0 LAS2 LAS1 LAS0 0 0 0 MAS
rc/0 r/0 r/0 r/0 r/0 r/0 r/1 r/0 r/0 r/0 r/1 r/0 r/0 r/0 r/0 r/0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
EER RWE 0 0 PEAS
DON
E
PEG 0 0 0 0 PGM PSUS ERS ESUS EHV
rc/0 rc/0 r/0 r/0 r/0 r/1 r/1 r/0 r/0 r/0 r/0 rw/0 rw/0 rw/0 rw/0 rw/0
Figure 17-3. Module Configuration Register (MCR)