Flash Memory
MPC5606S Microcontroller Reference Manual, Rev. 7
556 Freescale Semiconductor
Table 17-8. MCR field descriptions
Field Description
0 EDC: ECC Data Correction (Read/Clear)
EDC provides information on previous reads. If a ECC Single Error detection and correction occurred, the
EDC bit will be set to 1. This bit must then be cleared, or a reset must occur before this bit will return to
a 0 state. This bit may not be set to 1 by the user.
In the event of a ECC Double Error detection, this bit will not be set.
If EDC is not set, or remains 0, this indicates that all previous reads (from the last reset, or clearing of
EDC) were not corrected through ECC.
Since this bit is an error flag, it must be cleared to 0 by writing 1 to the register location. A write of 0 will
have no effect.
The function of this bit is SoC dependent and it can be configured to be disabled.
0: Reads are occurring normally.
1: An ECC Single Error occurred and was corrected during a previous read.
1:4 Reserved (Read Only)
Write these bits has no effect and read these bits always outputs 0.
5:7 SIZE2-0: array space SIZE 2-0 (Read Only)
The value of SIZE field is dependent upon the size of the flash module, according to Tabl e 17-9.
8 Reserved (Read Only).
Write this bit has no effect and read this bit always outputs 0.
9:11 LAS2-0: Low Address Space 2- (Read Only)
The value of the LAS field correspond to the configuration of the Low Address Space, according to
Tabl e 17-10.
12:14 Reserved (Read Only)
Write these bits has no effect and read these bits always outputs 0.
15 MAS: Mid Address Space (Read Only)
The value of the MAS field correspond to the configuration of the Mid Address Space, according to
Tabl e 17-11.
16 EER: ECC event ERror (Read/Clear)
EER provides information on previous reads. If a ECC Double Error detection occurred, the EER bit will
be set to 1.
This bit must then be cleared, or a reset must occur before this bit will return to a 0 state. This bit may not
be set to 1 by the user.
In the event of a ECC Single Error detection and correction, this bit will not be set.
If EER is not set, or remains 0, this indicates that all previous reads (from the last reset, or clearing of
EER) were correct.
Since this bit is an error flag, it must be cleared to 0 by writing 1 to the register location. A write of 0 will
have no effect.
0: Reads are occurring normally.
1: An ECC double Error occurred during a previous read.
To Next Page
Loading...
