Clock Description
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 191
Figure 8-2. MC_CGM block diagram
8.4.1.2 Features
The MC_CGM includes the following features:
• Generates system and peripheral clocks
• Selects and enables/disables the system clock supply from system clock sources according to
MC_ME control
• Contains a set of registers to control clock dividers for divided clock generation
• Contains a set of registers to control peripheral clock selection
• Supports multiple clock sources and maps their address spaces to its memory map
• Generates an output clock
Output Clock
Selector/Divider
Registers
Platform Interface
core
FIRC
FXOSC
FMPLL0
FMPLL1
MC_CGM
MC_ME
MC_RGM
System Clock
Multiplexer/Divider
peripherals
PH[4]
Auxiliary Clock
Selector/Divider
Mapped Modules Interface
mapped
peripherals
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