Clock Description
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 187
Chapter 8
Clock Description
This chapter describes the clock architectural implementation for MPC5606S.
8.1 Clock architecture
System clocks are generated from three sources:
• External oscillator FXOSC (4–16 MHz)
• High speed internal RC (16 MHz)
• FMPLL0 clocked by FXOSC, still one of system clock sources
Additionally, there are two low-power oscillators:
• Low-speed internal RC (128 kHz)
• Low-power external oscillator SXOSC (32 KHz)
Additionally, there is a secondary FMPLL:
• FMPLL1 clocked by FXOSC is available as a clock source, only for eMIOS_0, eMIOS_1,
QuadSPI, and DCU modules
The clock architecture is shown in Figure 8-1.
To Next Page
Loading...
