NXP Semiconductors MPC5606S - PDI Interaction with Other Modules

Display Control Unit (DCU)
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 439
12.8.2.2 PDI interaction with other modules
Figure 12-82. PDI interacting directly with the external sensor
In Figure 12-82, PDI directly accepts the data from the external video source. External device must support
the interface mentioned in the document.
Figure 12-83. PDI interacting with FPGA in-between
As shown in Figure 12-83, PDI would not directly interface to the video source or any existing image
processor chip. FPGA sits in between.
In normal mode, PDI clock frequency should be equal to pixel clock frequency desired for the TFT display
driver. In narrow mode, PDI clock frequency is double the desired pixel clock frequency. The incoming
clock does not have to bear any relation to the DCU clock. Prior to the lock condition the DCU will run
on the internal DCU clock. After lock has been achieved, the DCU will switch to the clock from the PDI
stream.
PDI clock would be used to send data and timing signal to TFT/LCD display driver.
In all cases, the resolution of the incoming stream and the Hsync and Vsync frequency must be the same
as that of the TFT screen. All the horizontal parameter (Front Porch width, Back Porch width, Pulse width)
Video
Source
Video source fed directly to PDI
Other layer data to
mix with PDI
(BG layer)
PDI
DCU
Display
Driver/
Screen
Data being sent at
PDI rate
PDI output in format
required by DCU
Video source output fed directly to FPGA,
Other layer data to
mix with PDI
(BG layer)
PDI
DCU
Display
Driver/
Screen
PDI output in format
required by DCU
Video
Source
FPGA
which converts the data to a format
required by the PDI.
Data being sent at
PDI rate