Reset Generation Module (MC_RGM)
MPC5606S Microcontroller Reference Manual, Rev. 7
1076 Freescale Semiconductor
31.3.1 Register descriptions
Unless otherwise noted, all registers may be accessed as 32-bit words, 16-bit half-words, or 8-bit bytes.
The bytes are ordered according to big endian. For example, the RGM_STDBY register may be accessed
as a word at address 0xC3FE_4018, as a half-word at address 0xC3FE_401A, or as a byte at address
0xC3FE_401B.
0xC3FE_4018 RGM_FESS /
RGM_STDBY
R
SS_EXR
SS_FLASH
SS_LVD45
SS_CMU0_FHL
SS_CMU0_OLR
SS_FMPLL0
SS_CHKSTOP
SS_SOFT
SS_CORE
SS_JTAG
W
R 0 0 0 0 0 0 0 0
BOOT_FROM_BKP_RAM
0 0 0 0 0 0 0
W
0xC3FE_401C RGM_FBRE
R
BE_EXR
BE_FLASH
BE_LVD45
BE_CMU0_FHL
BE_CMU0_OLR
BE_FMPLL0
BE_CHKSTOP
BE_SOFT
BE_CORE
BE_JTAG
W
0xC3FE_4020
…
0xC3FE_7FFC
Reserved
Table 31-2. MC_RGM memory map (continued)
Address Name
01232756789101112131415
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
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