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NXP Semiconductors MPC5606S - IEEE 1149.1 JTAG Controller (JTAGC)

NXP Semiconductors MPC5606S
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Overview
MPC5606S Microcontroller Reference Manual, Rev. 7
68 Freescale Semiconductor
Up to 10-bit audio amplitude resolution
Polyphonic sound synthesis
Playback of sample-based waveforms
Text-to-speech possibility
Requires external lowpass filter
1.5.30 IEEE 1149.1 JTAG Controller (JTAGC)
JTAGC features the following:
Backward compatible to standard JTAG IEEE 1149.1-2001 test access port (TAP) interface
Support for boundary scan testing
1.5.31 Nexus Development Interface (NDI)
Nexus features the following:
Per IEEE-ISTO 5001-2003
Nexus 2 Plus features supported
Static debug
Watchpoint messaging
Ownership trace messaging
Program trace messaging
Real time read/write of any internally memory-mapped resources through JTAG pins
Overrun control, which selects whether to stall before Nexus overruns or else keep executing
and allow overwrite of information
Watchpoint triggering, watchpoint triggers program tracing
Configured via the IEEE 1149.1 (JTAG) port
Nexus Auxiliary port supported on the 176 LQFP and 208-pin BGA package FOR
DEVELOPMENT ONLY
Narrow Auxiliary Nexus port supporting support trace, with two MDO pins
Wide Auxiliary Nexus port supporting higher bandwidth trace, with four MDO pins
1.6 Developer environment
The MPC5606S MCU family uses tools and third-party developers that offer a widespread, established
network of tool and software vendors. It also features a high-performance Nexus debug interface.
The following development support is available:
Automotive evaluation boards (EVB) featuring CAN, LIN interfaces, and more
Compilers
Debuggers

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