FlexCAN
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 669
Chapter 18
FlexCAN
18.1 Introduction
The FlexCAN module is a communication controller implementing the CAN protocol according to the
CAN 2.0B protocol specification. A general block diagram is shown in Figure 18-1, which describes the
main subblocks implemented in the FlexCAN module. These include two embedded memories, one for
storing Message Buffers (MB) and another one for storing Rx Individual Mask Registers. Support for up
to 64 Message Buffers is provided. The functions of the submodules are described in subsequent sections.
Figure 18-1. FlexCAN block diagram
18.1.1 Overview
The CAN protocol was primarily, but not only, designed to be used as a vehicle serial data bus, meeting
the specific requirements of this field: real-time processing, reliable operation in the EMI environment of
a vehicle, cost-effectiveness, and required bandwidth. The FlexCAN module is a full implementation of
the CAN protocol specification, Version 2.0 B [Ref. 1], which supports both standard and extended
288/544/1056-
Bus Interface Unit
max MB #
(0–63)
IP Bus Interface
CAN
Message
CAN Tx
CAN Rx
MB1
MB0
MB62
MB63
Clocks, Address and Data buses,
Interrupt and Test Signals
Buffer
Management
Protocol
Interface
byte RAM
Message
Buffer
Storage
64/128/256-
RXIMR1
RXIMR0
RXIMR62
RXIMR63
byte RAM
ID Mask
Storage
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