Flash Memory
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 625
After the interlock write, additional writes only affect the data to be programmed at the word location
determined by address bit 2. Unwritten locations default to a data value of 0xFFFFFFFF. If multiple writes
are done to the same location the data for the last write is used in programming.
While MCR.DONE is low and MCR.EHV is high, the user may clear EHV, resulting in a program abort.
A Program abort forces the Module to step 8 of the program sequence.
An aborted program will result in MCR.PEG being set low, indicating a failed operation. MCR.DONE
must be checked to know when the aborting command has completed.
The data space being operated on before the abort will contain indeterminate data. This may be recovered
by repeating the same program instruction or executing an erase of the affected blocks.
Example 17-8. Double Word program of data 0x55AA55AA at address 0x00AAA8 and data 0xAA55AA55 at
address 0x00AAAC.
MCR = 0x00000010; /* Set PGM in MCR: Select Operation */
(0x00AAA8) = 0x55AA55AA; /* Latch Address and 32 LSB data */
(0x00AAAC) = 0xAA55AA55; /* Latch 32 MSB data */
MCR = 0x00000011; /* Set EHV in MCR: Operation Start */
do /* Loop to wait for DONE=1 */
{ tmp = MCR; /* Read MCR */
} while ( !(tmp & 0x00000400) );
status = MCR & 0x00000200; /* Check PEG flag */
MCR = 0x00000010; /* Reset EHV in MCR: Operation End */
MCR = 0x00000000; /* Reset PGM in MCR: Deselect Operation */
17.3.7.3 Sector erase
Erase changes the value stored in all bits of the selected block(s) to logic 1.
An erase sequence operates on any combination of blocks (sectors) in the low, mid or high address space,
or the Shadow block (if available). The test block cannot be erased.
The erase sequence is fully automated within the flash memory. The user only needs to select the blocks
to be erased and initiate the erase sequence.
Locked/disabled blocks cannot be erased.
If multiple blocks are selected for erase during an erase sequence, no specific operation order must be
assumed.
The Erase operation consists of the following sequence of events:
1. Change the value in the MCR.ERS bit from 0 to 1.
2. Select the block(s) to be erased by writing 1s to the appropriate register(s) in LMS or HBS
registers.
If the Shadow block is to be erased, this step may be skipped, and LMS and HBS are ignored.
Note that Lock and Select are independent. If a block is selected and locked, no erase will occur.
3. Write to any address in flash memory. This is referred to as an erase interlock write.
4. Write a logic 1 to the MCR.EHV bit to start the internal erase sequence or skip to step 9 to
terminate.
5. Wait until the MCR.DONE bit goes high.
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