LIN Controller (LINFlex)
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 841
FEIE
23
Framing Error Interrupt Enable
0 No interrupt on Framing error.
1 Interrupt generated on Framing error.
BOIE
24
Buffer Overrun Interrupt Enable
0 No interrupt on Buffer overrun.
1 Interrupt generated on Buffer overrun.
LSIE
25
LIN State Interrupt Enable
0 No interrupt on LIN state change.
1 Interrupt generated on LIN state change.
This interrupt can be used for debugging purposes. It has no status flag but is reset when writing
ā1111ā into LINS[0:3] in the LINSR.
WUIE
26
Wake-up Interrupt Enable
0 No interrupt when WUF bit in LINSR or UARTSR is set.
1 Interrupt generated when WUF bit in LINSR or UARTSR is set.
DBFIE
27
Data Buffer Full Interrupt Enable
0 No interrupt when buffer data register is full.
1 Interrupt generated when data buffer register is full.
DBEIE
28
Data Buffer Empty Interrupt Enable
0 No interrupt when buffer data register is empty.
1 Interrupt generated when data buffer register is empty.
DRIE
29
Data Reception Complete Interrupt Enable
0 No interrupt when data reception is completed.
1 Interrupt generated when data received flag (DRF) in LINSR or UARTSR is set.
DTIE
30
Data Transmitted Interrupt Enable
0 No interrupt when data transmission is completed.
1 Interrupt generated when data transmitted flag (DTF) is set in LINSR or UARTSR.
HRIE
31
Header Received Interrupt Enable
0 No interrupt when a valid LIN header has been received.
1 Interrupt generated when a valid LIN header has been received, that is, HRF bit in LINSR is set.
Table 23-7. LINIER field descriptions (continued)
Field Description
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