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NXP Semiconductors MPC5606S - Page 400

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Display Control Unit (DCU)
MPC5606S Microcontroller Reference Manual, Rev. 7
398 Freescale Semiconductor
Figure 12-50. Soft Lock Register L1
Offset: 0x308 Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R 0 0 0 0
SLB_L1_1
SLB_L1_2
SLB_L1_3
SLB_L1_4
0 0 0 0
SLB_L1_5
SLB_L1_6
SLB_L1_7
0
W
WEN_L1_1
WEN_L1_2
WEN_L1_3
WEN_L1_4
WEN_L1_5
WEN_L1_6
WEN_L1_7
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Table 12-45. Soft Lock Register L1 field descriptions
Field Description
0
WEN_L1_1
Write Enable for Soft Lock Bit SLB_L1_1
0 SLB is not modified
1 Value is written to SLB
1
WEN_L1_2
Write Enable for Soft Lock Bit SLB_L1_2
0 SLB is not modified
1 Value is written to SLB
2
WEN_L1_3
Write Enable for Soft Lock Bit SLB_L1_3
0 SLB is not modified
1 Value is written to SLB
3
WEN_L1_4
Write Enable for Soft Lock Bit SLB_L1_4
0 SLB is not modified
1 Value is written to SLB
4
SLB_L1_1
Soft Lock Bit for Control Desc L1_1 Register.
0 Associated protected register is not locked and writeable
1 Associated protected register is locked for write access
5
SLB_L1_2
Soft Lock Bit for Control Desc L1_2 Register.
0 Associated protected register is not locked and writeable
1 Associated protected register is locked for write access
6
SLB_L1_3
Soft Lock Bit for Control Desc L1_3 Register.
0 Associated protected register is not locked and writeable
1 Associated protected register is locked for write access
7
SLB_L1_4
Soft Lock Bit for Control Desc L1_4 Register.
0 Associated protected register is not locked and writeable
1 Associated protected register is locked for write access
8
WEN_L1_5
Write Enable for Soft Lock Bit SLB_L1_5
0 SLB is not modified
1 Value is written to SLB

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