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NXP Semiconductors MPC5606S - Page 1142

NXP Semiconductors MPC5606S
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Stepper Motor Controller (SMC)
MPC5606S Microcontroller Reference Manual, Rev. 7
1140 Freescale Semiconductor
Figure 35-19. Left aligned
Right aligned (MCCCx[MCAM] = 0x2): The output will start inactive (high if MCCTL1[RECIRC] = 0
and low if
MCCTL1[RECIRC] = 1) and will turn active after the number of counts specified by the difference of the
contents of period register and the corresponding duty cycle register.
Figure 35-20. Right aligned
Center aligned (MCCCx[MCAM] = 0x3): Even periods will be output left aligned, odd periods will be
output right aligned. PWM operation starts with the even period after the channel has been enabled. PWM
operation in center aligned mode might start with the odd period if the channel has not been disabled before
changing the alignment mode to center aligned.
0 15
PWM Output
0
1 Period
100 Counts
Motor Controller
Timer Counter
Motor Controller
Timer Counter
Clock
0
1 Period
100 Counts
15 99
99
MCCTL0[DITH] = 0, MCCCx[MCAM] = 0x1, MCDCx[DUTY] = 15, MCPER[PER] = 100,
MCCTL1[RECIRC] = 0
0 85
PWM Output
0
1 Period
100 Counts
Motor Controller
Timer Counter
Motor Controller
Timer Counter
Clock
0
1 Period
100 Counts
85 99
99
MCCTL0[DITH] = 0, MCCCx[MCAM] = 0x2, MCDCx[DUTY] = 15, MCPER[PER] = 100,
MCCTL1[RECIRC] = 0

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