NXP Semiconductors MPC5606S - Page 344

Display Control Unit (DCU)
MPC5606S Microcontroller Reference Manual, Rev. 7
342 Freescale Semiconductor
0x1C4 CtrlDescCursor_2 Register R/W 0x00000000 on page 362
0x1C8 CtrlDescCursor_3 Register R/W 0x00000000 on page 363
0x1CC CtrlDescCursor_4 Register R/W 0x00000000 on page 363
0x1D0 DCU_MODE Register R/W 0x00000000 on page 364
0x1D4 BGND Register R/W 0x00000000 on page 366
0x1D8 DISP_SIZE Register R/W 0x00000000 on page 367
0x1DC HSYN_PARA Register R/W 0x00C01803 on page 368
0x1E0 VSYN_PARA Register R/W 0x00C01803 on page 368
0x1E4 SYNPOL Register R/W 0x00000000 on page 369
0x1E8 THRESHOLD Register R/W 0x0000780A on page 370
0x1EC INT_STATUS Register R 0x00000000 on page 371
0x1F0 INT_MASK Register R/W 0x000F7FFF on page 373
0x1F4 COLBAR_1 Register R/W 0xFF000000 on page 376
0x1F8 COLBAR_2 Register R/W 0xFF0000FF on page 376
0x1FC COLBAR_3 Register R/W 0xFF00FFFF on page 377
0x200 COLBAR_4 Register R/W 0xFF00FF00 on page 377
0x204 COLBAR_5 Register R/W 0xFFFFFF00 on page 378
0x208 COLBAR_6 Register R/W 0xFFFF0000 on page 378
0x20C COLBAR_7 Register R/W 0xFFFF00FF on page 379
0x210 COLBAR_8 Register R/W 0xFFFFFFFF on page 379
0x214 DIV_RATIO Register R/W 0x0000001F on page 379
0x218 SIGN_CALC_1 Register R/W 0x00000000 on page 380
0x21C SIGN_CALC_2 Register R/W 0x00000000 on page 381
0x220 CRC_VAL Register R/W 0x00000000 on page 381
0x224 PDI_STATUS Register R/W 0x00000000 on page 382
0x228 Mask_PDI_STATUS Register R/W 0x000003FF on page 383
0x22C PARR_ERR_STATUS Register R/W 0x00000000 on page 384
0x230 Mask_PARR_ERR_STATUS Register R/W 0x0007FFFF on page 387
0x234 THRESHOLD_INP_BUF_1 Register R/W 0xFF00FF00 on page 389
0x238 THRESHOLD_INP_BUF_2 Register R/W 0xFF00FF00 on page 389
0x23C LUMA_COMP Register R/W 0x9512A254 on page 390
0x240 CHROMA_RED Register R/W 0x03310000 on page 391
0x244 CHROMA_GREEN Register R/W 0x06600F38 on page 391
Table 12-3. DCU register map (continued)
Address offset Register Access Reset value Location