NXP Semiconductors MPC5606S - Page 352

Display Control Unit (DCU)
MPC5606S Microcontroller Reference Manual, Rev. 7
350 Freescale Semiconductor
PARR_ERR_
STATUS
0x22C
R 0 0 0 0 0 0 0 0 0 0 0 0 0
HWC_ERR
SIG_ERR
DISP_ERR
W w1c w1c w1c
R
L15_PARR_ERR L14_PARR_ERR L13_PARR_ERR L12_PARR_ERR L11_PARR_ERR L10_PARR_ERR
L9_PARR_ERR L8_PARR_ERR L7_PARR_ERR L6_PARR_ERR L5_PARR_ERR L4_PARR_ERR L3_PARR_ERR L2_PARR_ERR L1_PARR_ERR L0_PARR_ERR
W w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c w1c
Mask_PARR_
ERR_STATUS
0x230
R 0 0 0 0 0 0 0 0 0 0 0 0 0
M_HWC_ERR
M_SIG_ERR
M_DISP_ERR
W
R
M_L15_PARR_ERR M_L14_PARR_ERR M_L13_PARR_ERR M_L12_PARR_ERR M_L11_PARR_ERR M_L10_PARR_ERR
M_L9_PARR_ERR M_L8_PARR_ERR M_L7_PARR_ERR M_L6_PARR_ERR M_L5_PARR_ERR M_L4_PARR_ERR M_L3_PARR_ERR M_L2_PARR_ERR M_L1_PARR_ERR M_L0_PARR_ERR
W
THRESHOLD
_INP_BUF
0x234
R
INP_BUF_P2_HI INP_BUF_P2_LO
W
R
INP_BUF_P1_HI INP_BUF_P1_LO
W
THRESHOLD
_INP_BUF
0x238
R
INP_BUF_P4_HI INP_BUF_P4_LO
W
R
INP_BUF_P3_HI INP_BUF_P3_LO
W
LUMA_COMP
0x23C
R
Y_RED Y_GREEN[0:4]
W
R
Y_GREEN[5:9] Y_BLUE
W
Table 12-4. Register descriptions (continued)
Name
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31