Display Control Unit (DCU)
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 365
Figure 12-14. DCU Mode Register (DCU_MODE)
Offset: 0x1D0 Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
DCU_SW_RESET
0 0 0 0 0 0 0 0
BLEND_ITER PDI_SYNC_LOCK
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
PDI_INTERPOL_EN
RASTER_EN
PDI_EN
PDI_BYTE_REV
PDI_DE_MODE
PDI_NARROW_MODE
PDI_MODE
PDI_SLAVE_MODE
TAG_EN
SIG_EN
PDI_SYNC
0
EN_GAMMA
DCU_MODE
W
Reset 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Table 12-16. DCU_MODE field descriptions
Field Description
0
DCU_SW_RESET
Used to clear all the registers to reset state
0 DCU registers are not cleared
1 All the DCU registers are put in reset state
9–11
BLEND_ITER
Defines the number of planes used for blending.
010 Two-plane blending
011 Three-plane blending
100 Four-plane blending
All other values: two-plane blending is selected and BLEND_ITER is set to 2.
12–15
PDI_SYNC_LOCK
Defines the number of frames which should be received by the PDI validation state machine
before it locks and sets the PDI_LOCK_DET bit in the PDI Status Register (see
Section 12.3.4.26, PDI Status Register).
16
PDI_INTERPOL_E
N
Control Bit to decide whether the conversion from YCbCr 4:2:2 to 4:4:4 needs to be done using
interpolation or Chroma value is same for two pixels
0 Chroma value is same for two pixels
1 Interpolation is enabled.
17
RASTER_EN
Enables raster scanning of pixel data including the VSYNC and HSYNC signals and the pixel
data. For correct operation RASTER_EN should only be changed when DCU_MODE is
configured to off. Changes to this bit take effect after the completion of the current frame.
0 Disabled
1 Enabled
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