NXP Semiconductors MPC5606S - Page 388

Display Control Unit (DCU)
MPC5606S Microcontroller Reference Manual, Rev. 7
386 Freescale Semiconductor
17
L14_PARR_ERR
Interrupt occurs whenever there is an error in layer 14.
0 Parameter error is not set
1 Parameter error is set
18
L13_PARR_ERR
Interrupt occurs whenever there is an error in layer 13.
0 Parameter error is not set
1 Parameter error is set
19
L12_PARR_ERR
Interrupt occurs whenever there is an error in layer 12.
0 Parameter error is not set
1 Parameter error is set
20
L11_PARR_ERR
Interrupt occurs whenever there is an error in layer 11.
0 Parameter error is not set
1 Parameter error is set
21
L10_PARR_ERR
Interrupt occurs whenever there is an error in layer 10.
0 Parameter error is not set
1 Parameter error is set
22
L9_PARR_ERR
Interrupt occurs whenever there is an error in layer 9
0 Parameter error is not set
1 Parameter error is set
23
L08_PARR_ERR
Interrupt occurs whenever there is an error in layer 8.
0 Parameter error is not set
1 Parameter error is set
24
L7_PARR_ERR
Interrupt occurs whenever there is an error in layer 7
0 Parameter error is not set
1 Parameter error is set
25
L6_PARR_ERR
Interrupt occurs whenever there is an error in layer 6.
0 Parameter error is not set
1 Parameter error is set
26
L5_PARR_ERR
Interrupt occurs whenever there is an error in layer 5.
0 Parameter error is not set
1 Parameter error is set
27
L4_PARR_ERR
Interrupt occurs whenever there is an error in layer 4
0 Parameter error is not set
1 Parameter error is set
28
L3_PARR_ERR
Interrupt occurs whenever there is an error in layer 3.
0 Parameter error is not set
1 Parameter error is set
29
L2_PARR_ERR
Interrupt occurs whenever there is an error in layer 2.
0 Parameter error is not set
1 Parameter error is set
Table 12-32. Parameter Error Status Register field descriptions (continued)
Field Description