NXP Semiconductors MPC5606S - Page 390

Display Control Unit (DCU)
MPC5606S Microcontroller Reference Manual, Rev. 7
388 Freescale Semiconductor
17
M_L14_parr_err
M_L14_parr_err interrupt mask
0 Do not mask the interrupt
1 Mask the interrupt
18
M_L13_parr_err
M_L13_parr_err interrupt mask
0 Do not mask the interrupt
1 Mask the interrupt
19
M_L12_parr_err
M_L12_parr_err interrupt mask
0 Do not mask the interrupt
1 Mask the interrupt
20
M_L11_parr_err
M_L11_parr_err interrupt mask
0 Do not mask the interrupt
1 Mask the interrupt
21
M_L10_parr_err
M_L10_parr_err interrupt mask
0 Do not mask the interrupt
1 Mask the interrupt
22
M_L9_parr_err
M_L9_parr_err interrupt mask
0 Do not mask the interrupt
1 Mask the interrupt
23
M_L8_parr_err
M_L8_parr_err interrupt mask
0 Do not mask the interrupt
1 Mask the interrupt
24
M_L7_parr_err
M_L7_parr_err interrupt mask
0 Do not mask the interrupt
1 Mask the interrupt
25
M_L6_parr_err
M_L6_parr_err interrupt mask
0 Do not mask the interrupt
1 Mask the interrupt
26
M_L5_parr_err
M_L5_parr_err interrupt mask
0 Do not mask the interrupt
1 Mask the interrupt
27
M_L4_parr_err
M_L4_parr_err interrupt mask
0 Do not mask the interrupt
1 Mask the interrupt
28
M_L3_parr_err
M_L3_parr_err interrupt mask
0 Do not mask the interrupt
1 Mask the interrupt
29
M_L2_parr_err
M_L2_parr_err interrupt mask
0 Do not mask the interrupt
1 Mask the interrupt
Table 12-33. Mask parameter error status register field descriptions (continued)
Field Description