Enhanced Direct Memory Access (eDMA)
MPC5606S Microcontroller Reference Manual, Rev. 7
482 Freescale Semiconductor
The occurrence of any type of error causes the DMA engine to immediately stop, and the appropriate
channel bit in the DMA Error register to be asserted. At the same time, the details of the error condition
are loaded into the DMAES register. The major loop complete indicators, setting the transfer control
descriptor done flag and the possible assertion of an interrupt request, are not affected when an error is
detected. See
Figure 15-3 and Table 15-3 for the DMAES definition.
Address: Base + 0x0004 Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R VLD 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ECX
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R GPE CPE 0 ERRCHN SAE SOE DAE DOE NCE SGE SBE DBE
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 15-3. DMA Error Status (DMAES) register
Table 15-3. DMA Error Status (DMAES) field descriptions
Name Description
VLD Logical OR of all DMAERRH and DMAERRL status bits.
0 No DMAERR bits are set.
1 At least one DMAERR bit is set indicating a valid error exists that has not been cleared.
ECX Transfer cancelled
0 No cancelled transfers.
1 The last recorded entry was a cancelled transfer via the error cancel transfer input.
GPE Group Priority Error
0 No group priority error.
1 The last recorded error was a configuration error among the group priorities. All group priorities
are not unique.
CPE Channel Priority Error
0 No channel priority error.
1 The last recorded error was a configuration error in the channel priorities within a group. All
channel priorities within a group are not unique.
ERRCHN[0:5] Error Channel Number or Cancelled Channel Number
The channel number of the last recorded error (excluding GPE and CPE errors) or last recorded
transfer that was error cancelled.
SAE Source Address Error
0 No source address configuration error.
1 The last recorded error was a configuration error detected in the TCD.saddr field. TCD.saddr is
inconsistent with TCD.ssize.
SOE Source Offset Error
0 No source offset configuration error.
1 The last recorded error was a configuration error detected in the TCD.soff field. TCD.soff is
inconsistent with TCD.ssize.
DAE Destination Address Error
0 No destination address configuration error.
1 The last recorded error was a configuration error detected in the TCD.daddr field. TCD.daddr
is inconsistent with TCD.dsize.
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