NXP Semiconductors MPC5606S - Page 502

Enhanced Direct Memory Access (eDMA)
MPC5606S Microcontroller Reference Manual, Rev. 7
500 Freescale Semiconductor
Figure 15-31 and Table 15-26 define word 5 of the TCDn structure, the citer and doff fields.
Address: DMA_Offset + 0x1000 + (32 × n) + 0x10 Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
daddr[0:15]
W
Reset — — — — — — — — — — — — — — — —
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
daddr[16:31]
W
Reset — — — — — — — — — — — — — — — —
Figure 15-30. TCDn Word 4 (TCDn.daddr) field
Table 15-25. TCDn Word 4 (TCDn.daddr) field description
Name Description
daddr[0:31] Destination address
Memory address pointing to the destination data.
Address: DMA_Offset + 0x1000 + (32 × n) + 0x14 Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R citer.
e_lin
k
citer[0:5] or
citer.linkch[0:5]
citer[6:14]
W
Reset — — — — — — — — — — — — — — — —
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
doff[16:31]
W
Reset — — — — — — — — — — — — — — — —
Figure 15-31. TCDn Word 5 (TCDn.{citer,doff}) fields
Table 15-26. TCDn Word 5 (TCDn.{doff,citer}) field descriptions
Name Description
citer.e_link Enable channel-to-channel linking
on minor loop complete
As the channel completes the inner minor loop, this flag enables the linking to another
channel, defined by citer.linkch[5:0]. The link target channel initiates a channel service
request via an internal mechanism that sets the TCD.start bit of the specified channel. If
channel linking is disabled, the citer value is extended to 15 bits in place of a link channel
number. If the “major” loop is exhausted, this link mechanism is suppressed in favor of the
major.e_link channel linking.
Note: This bit must be equal to the biter.e_link bit . Otherwise, a configuration error will be
reported.
0 The channel-to-channel linking is disabled.
1 The channel-to-channel linking is enabled.