Flash Memory
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 593
• The Non-volatile Modify Protection Registers are physically located in Test flash their bits can be
programmed to 0 only once and they can no more be restored to 1.
• The Volatile Modify Protection Registers are Read/Write registers which bits can be written at 0 or
1 by the user application.
A software mechanism is provided to independently lock/unlock each Low, Mid and High Address Space
Block against program and erase.
Software locking is done through the LML (Low/Mid Address Space Block Lock Register) or HBL (High
Address Space Block Lock Register) registers.
An alternate means to enable software locking for blocks of Low Address Space only is through the SLL
(Secondary Low/Mid Address Space Block Lock Register).
All these registers have a non-volatile image stored in Test flash (NVLML, NVHBL, NVSLL), so that the
locking information is kept on reset.
On delivery the Test flash non-volatile image is at all 1s, meaning all sectors are locked.
By programming the non-volatile locations in Test flash the selected sectors can be unlocked.
Being the Test flash One Time Programmable (that is, not erasable), once unlocked the sectors cannot be
locked again.
Of course, on the contrary, all the volatile registers can be written at 0 or 1 at any time, therefore the user
application can lock and unlock sectors when desired.
17.2.7.3.2 Censored mode
The Censored mode information is stored in non-volatile flash memory cells located in the Shadow block.
This information is read once during the flash memory initialization phase following the exit from Reset
and is stored in Volatile registers that act as actuators.
The reset state of all the volatile censored mode registers is the protected state.
All the non-volatile Censored mode registers can be programmed through a normal double word program
operation at the related locations in the Shadow block.
The non-volatile Censored mode registers can be erased by erasing the Shadow block.
• The non-volatile Censored mode registers are physically located in the Shadow block their bits can
be programmed to 0 and eventually restored to 1 by erasing the Shadow block.
• The Volatile Censored mode registers are registers not accessible by the user application.
The flash memory macrocell provides two levels of protection against piracy:
• If bits CW15-0 of NVSCI0 are programmed at 0x55AA and NVSC1 = NVSCI0 the Censored
mode is disabled, while all the other possible values enable the Censored mode.
• If bits SC15-0 of NVSCI0 are programmed at 0x55AA and NVSC1 = NVSCI0 the Public Access
is disabled, while all the other possible values enable the Public Access.
The parts are delivered to the user with Censored mode and Public Access disabled.
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