FlexCAN
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 707
The FlexCAN module supports a variety of means to set up bit timing parameters that are required by the
CAN protocol. The Control Register has various fields used to control bit timing parameters: PRESDIV,
PROPSEG, PSEG1, PSEG2, and RJW. See Section 18.3.4.2, Control Register (CTRL).
The PRESDIV field controls a prescaler that generates the Serial Clock (Sclock), whose period defines the
time quantum used to compose the CAN waveform. A time quantum is the atomic unit of time handled by
the CAN engine.
A bit time is subdivided into three segments
1
(reference Figure 18-17 and Table 18-20):
• SYNC_SEG: This segment has a fixed length of one time quantum. Signal edges are expected to
happen within this section.
• Time Segment 1: This segment includes the Propagation Segment and the Phase Segment 1 of the
CAN standard. It can be programmed by setting the PROPSEG and the PSEG1 fields of the CTRL
Register so that their sum (plus 2) is in the range of 4 to 16 time quanta.
• Time Segment 2: This segment represents the Phase Segment 2 of the CAN standard. It can be
programmed by setting the PSEG2 field of the CTRL Register (plus 1) to be 2 to 8 time quanta
long.
.
1. For further explanation of the underlying concepts please refer to ISO/DIS 11519–1, Section 10.3. See also the Bosch
CAN
2.0A/B protocol specification dated September 1991 for bit timing.
f
Tq
f
CANCLK
Prescaler ValueÞ
-------------------------------------------=
Bit Rate
f
Tq
number of Time QuantaÞÞ Þ
-----------------------------------------------------------------------------------------=Þ
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