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NXP Semiconductors MPC5606S - Page 963

NXP Semiconductors MPC5606S
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Nexus Development Interface (NDI)
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 961
Reg
Index:
127 Access: User read/write
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
R
FPM
MCKO_GT
MCKO_EN
MCKO_DIV
EVT_EN
0 0 0 0 0 0 0 0 0
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31
R
LP_DBG_EN
0 0 0 0 0
SLEEP_SYNC
STOP_SYNC
0 0 0 0 0 0 0
PSTAT_EN
W
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Figure 26-4. Port Configuration Register (PCR)
Table 26-4. PCR field descriptions
Field Description
FPM Full Port Mode. The value of the FPM bit determines if the auxiliary output port uses the full MDO
port or a reduced MDO port to transmit messages.
0 A subset of MDO pins is used to transmit messages.
1 All MDO pins are used to transmit messages.
MCKO_GT MCKO Clock Gating Control. This bit is used to enable or disable MCKO clock gating. If clock
gating is enabled, the MCKO clock is gated when the NPC is in enabled mode but not actively
transmitting messages on the auxiliary output port. When clock gating is disabled, MCKO is
allowed to run even if no auxiliary output port messages are being transmitted.
0 MCKO gating is disabled.
1 MCKO gating is enabled.
MCKO_EN MCKO Enable. This bit enables the MCKO clock to run. When enabled, the frequency of MCKO
is determined by the MCKO_DIV field.
0 MCKO clock is driven to zero.
1 MCKO clock is enabled.

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