Revision History
MPC5606S Microcontroller Reference Manual, Rev. 7
1334 Freescale Semiconductor
Configurable
Enhanced Modular IO
Subsystem
Revised the “eMIOS clocking configuration” figure.
In the “Channel mode selection” table, changed the entry for 10101bb (was reserved, is
“Modulus Counter Buffered (Up/Down counter)”).
Added a footnote to the block diagram clarifying the channels available on eMIOS200_0
and eMIOS200_1.
Revised the EMIOSS[n] section.
Revised the “eMIOS clocking configuration” figure.
In the “Channel mode selection” table, changed the entry for 10101bb (was reserved, is
“Modulus Counter Buffered (Up/Down counter)”).
Added a footnote to the block diagram clarifying the channels available on eMIOS200_0
and eMIOS200_1.
Revised the “Features” section.
In the memory map, changed the entry for 0x020–0x11F (was used, is reserved).
Revised the EMIOSMCR section.
In the EMIOSUCDIS figures, changed the reset values (were 0/1, are 0).
Revised the EMIOSA[n], EMIOSB[n], EMIOSCNT[n], and EMIOSALTA[n] figures.
Revised the “UC BSL bits” table.
Analog-to-Digital
Converter
In the “Device-specific features” section, changed “PIT channel 3” to “PIT channel 2 (for
normal conversion trigger only)”.
Stepper Motor
Controller
Editorial changes.
Revised the “Low-power modes” section.
In the MCCTL0 section, deleted the MCHME field (not available on this device).
Deleted the “Operation in Halt Mode” section.
Renamed “Operation in Stop Mode” to “Operation in SMC Stop Mode”.
Corrected several entries in the “Impact of MCCTL1[RECIRC] and MCDCx[SIGN[4]] Bit on
the PWM Output” table.
Display Control Unit Revised the register description table and figures to show the “write-1-to-clear” (w1c) bits
clearly.
Revised the CtrlDescL0_1[WIDTH] field description.
Revised the CtrlDescL0_4[LUOFFS] field description.
Revised the DCU_MODE field descriptions.
Revised the SYN_POL field descriptions.
Revised the “DCU Mode selection and background color” section.
In the “Functional description” section, added the “Proper sequence for enabling and
disabling the DCU” section.
Revised the “Layer size and positioning” section.
In the “Graphics and data format” section, changed “modes” to “formats”.
In the “Blend options for BB and AB configurations” table, changed “Mode” to “Format”.
Revised the “Tile mode” and “CLUT/Tile RAM” sections.
In the “Synchronizing to panel frame rate” section, changed “configuration at the end of the
vertical blanking period” to “configuration present one HSYNC before the end of the
vertical blanking period”.
Revised the “Parallel data interface (camera interface)” section.
Added a step to the “DCU initialization” section.
Sound Generation
Logic
Revised the SGL_STATUS section to show one field, SDCIF, that is a “write-1-to-clear”
(w1c) field.
LCD Driver Revised the “Information Specific to This Device” section.
Table C-4. Changes between revisions 3 and 4 (continued)
Chapter Description
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