Revision History
MPC5606S Microcontroller Reference Manual, Rev. 7
Freescale Semiconductor 1333
Interrupt Controller In the Introduction section, changed “supports 126 interrupt requests” to “supports 122
interrupt requests”.
In the note above the interrupt vector table, changed “INTC_PSR0-INTC_PSR211” to
“INTC_PSR0_3-INTC_PSR204_206”.
In the “Priority management” section, changed “INTC_PSR0_3–INTC_PSR292_293” to
“INTC_PSR0_3–INTC_PSR204_206”.
In the “Initialization flow” section, changed “INTC_PSR0-INTC_PSR211” to
“INTC_PSR0_3 -INTC_PSR204_206”.
In the “ISR, RTOS, and task hierarchy” section, changed “INTC_PSR0-INTC_PSR211” to
“INTC_PSR0_3 -INTC_PSR204_206”.
In the “Scheduling a lower priority portion of an ISR” section, changed
“INTC_PSR0_3–INTC_PSR292_293” to “INTC_PSR0_3 -INTC_PSR204_206”.
In the note in the “Lowering priority within an ISR” section, changed
“INTC_PSR0_3–INTC_PSR292_293” to “INTC_PSR0_3 -INTC_PSR204_206”.
In the “Proper setting of interrupt request priority”, changed
“INTC_PSR0_3–INTC_PSR292_293” to “INTC_PSR0_3 -INTC_PSR204_206”.
System Integration Unit
Lite
Revised the “SIUL memory map” table and adjusted the register descriptions to match its
contents..
Revised the MIDR2[PARTNUM] field description.
Error Correction Status
Module
Replaced references to “sleep mode” with references to “low-power mode”.
System Timer Module Added a STM counter stop note.
Revised the STM_CIRn figure and field description to show the CIF bit as “w1c” (write 1 to
clear).
Revised the “Modes of operation” section.
Revised the STM_CR[FRZ] field description.
In the “Functional description” section, changed “enabled in debug mode” to “the MCU is
stopped by a debugger”.
Deserial Serial
Peripheral Interface
Revised the “Debug Mode” sections.
LIN Controller In the “Error calculation for programmed baud rates” table, revised the values for a baud
rate of 10417.
LINIER field descriptions: Inverted field name and bit number—was 18 BEIE; is BEIE 18.
FlexCAN Changed register names as follows:
• iFLAG1 to IFRL
• iFLAG2 to IFRH
• iMASK1 to IMRL
• iMASK2 to IMRH
Revised the MCR[MAXMB] field description.
Revised the ESR figure.
Revised the “Freeze Mode” description.
Revised the MCR[FRZ] field description.
Periodic Interrupt Timer Removed references to RTI (not present on this device).
Revised the block diagram to show 4 timers.
Revised the TFLG figure.
Inter-Integrated Circuit
Bus Controller Module
Revised the IBSR figure.
Table C-4. Changes between revisions 3 and 4 (continued)
Chapter Description
To Next Page
Loading...
