NXP Semiconductors MPC5606S - Page 506

Enhanced Direct Memory Access (eDMA)
MPC5606S Microcontroller Reference Manual, Rev. 7
504 Freescale Semiconductor
major.linkch[0:5] Link channel number
if (TCD.major.e_link = 0) then
No channel-to-channel linking (or chaining) is performed after the outer “major” loop counter is
exhausted.
else
After the “major” loop counter is exhausted, the DMA engine initiates a channel service request
at the channel defined by major.linkch[5:0] by setting that channel’s TCD.start bit.
The value contained in major.linkch[5:0] must not exceed the number of implemented channels.
done Channel done
This flag indicates the DMA has completed the outer major loop. It is set by the DMA engine as
the citer count reaches zero; it is cleared by software, or the hardware when the channel is
activated.
This bit must be cleared in order to write the major.e_link or e_sg bits.
active Channel active
This flag signals the channel is currently in execution. It is set when channel service begins,
and is cleared by the DMA engine as the inner minor loop completes or if any error condition is
detected.
major.e_link Enable channel-to-channel linking
on major loop complete
As the channel completes the outer major loop, this flag enables the linking to another channel,
defined by major.linkch[5:0]. The link target channel initiates a channel service request via an
internal mechanism that sets the TCD.start bit of the specified channel. To support the dynamic
linking coherency model, this field is forced to zero when written to while the TCD.done bit is
set.
0 The channel-to-channel linking is disabled.
1 The channel-to-channel linking is enabled.
e_sg Enable scatter/gather processing
As the channel completes the outer major loop, this flag enables scatter/gather processing in
the current channel. If enabled, the DMA engine uses dlast_sga as a memory pointer to a
0-modulo-32 address containing a 32-byte data structure which is loaded as the transfer control
descriptor into the local memory. To support the dynamic scatter/gather coherency model, this
field is forced to zero when written to while the TCD.done bit is set.
0 The current channel’s TCD is “normal” format.
1 The current channel’s TCD specifies a scatter gather format. The dlast_sga field provides a
memory pointer to the next TCD to be loaded into this channel after the outer major loop
completes its execution.
d_req Disable request
If this flag is set, the DMA hardware automatically clears the corresponding DMAERQ bit when
the current major iteration count reaches zero.
0 The channel’s DMAERQ bit is not affected.
1 The channel’s DMAERQ bit is cleared when the outer major loop is complete.
Table 15-28. TCDn Word 7 (TCDn.{biter, control/status}) field descriptions (continued)
Name Description