LIN Controller (LINFlex)
MPC5606S Microcontroller Reference Manual, Rev. 7
876 Freescale Semiconductor
This mode is similar to Slave mode as described in Section 23.8.2.2, Slave mode with the addition of
automatic resynchronization enabled by the LASE bit. In this mode LINFlex adjusts the fractional baud
rate generator after each Synch Field reception.
Automatic resynchronization method
When automatic resynchronization is enabled, after each LIN Break, the time duration between five falling
edges on RDI is sampled on f
periph_set_1_clk
and the result of this measurement is stored in an internal 19-bit
register called SM (not user accessible) (see Figure 23-32). Then the LFDIV value (and its associated
registers LINIBRR and LINFBRR) are automatically updated at the end of the fifth falling edge. During
LIN Synch Field measurement, the LINFlex state machine is stopped and no data is transferred to the data
register.
Figure 23-32. LIN synch field measurement
LFDIV is an unsigned fixed point number. The mantissa is coded on 12 bits in the LINIBRR and the
fraction is coded on 4 bits in the LINFBRR.
If LASE bit = 1 then LFDIV is automatically updated at the end of each LIN Synch Field.
Three internal registers (not user-accessible) manage the auto-update of the LINFlex divider (LFDIV):
• LFDIV_NOM (nominal value written by software at LINIBRR and LINFBRR addresses)
• LFDIV_MEAS (results of the Field Synch measurement)
• LFDIV (used to generate the local baud rate)
On transition to idle, break or break delimiter state due to any error or on reception of a complete frame,
hardware reloads LFDIV with LFDIV_NOM.
23.8.2.4.1 Deviation error on the Synch Field
The deviation error is checked by comparing the current baud rate (relative to the slave oscillator) with the
received LIN Synch Field (relative to the master oscillator). Two checks are performed in parallel.
The first check is based on a measurement between the first falling edge and the last falling edge of the
Synch Field:
•If D1 > 14.84%, LHE is set.
•If D1 < 14.06%, LHE is not set.
LIN Break
Break
Bit0
Bit1
Bit2
Bit3
Bit4
Bit5
Bit6
Bit7
Start
Bit
Stop
Bit
Next
Start
Bit
LIN Synch Field
Measurement = 8.T
BR
=SM.T
periph_set_1_clk
LFDIV(n)
LFDIV(n+1)
LFDIV = T
BR
/ (16.T
periph_set_1_clk
) = Rounding (SM / 128)
T
periph_set_1_clk
= Clock period
T
BR
= baud rate period
T
BR
T
BR
= 16.LFDIV.T
periph_set_1_clk
SM = Synch Measurement Register (19 bits)
delim.
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