Safety
MPC5606S Microcontroller Reference Manual, Rev. 7
118 Freescale Semiconductor
Figure 4-8. Change lock settings for mixed protection
The data written to SLBRn.SLB[0] is mirrored to SLBRn.SLB[1] as the corresponding register is 16-bit
protected. The data written to SLBRn.SLB[2] is blocked as the corresponding register is unprotected. The
data written to SLBRn.SLB[3] is written to SLBRn.SLB[3].
4.1.4.2.2 Enable locking via mirror module space (area #3)
It is possible to enable locking for a register after writing to it. To do so the mirrored module address space
must be used. Figure 4-9 shows one example:
Figure 4-9. Enable locking via mirror module space (area #3)
When writing to address 0x0008 the registers MR9 and MR8 in the protected module are updated. The
corresponding lock bits remain unchanged (left part of
Figure 4-6).
When writing to address 0x2008 the registers MR9 and MR8 in the protected module are updated. The
corresponding lock bits SLBR2.SLB[1:0] are set while the lock bits SLBR2.SLB[3:2] remain unchanged
(right part of
Figure 4-6).
Figure 4-10 shows an example where some addresses are protected and some are not:
Figure 4-10. Enable locking for protected and unprotected addresses
SLB0 SLB1 0 SLB3
SLBR
update lock bits
1SLBRn.WE[3:0]
to SLB0
write data
to SLB1 to SLB2 to SLB3
XX1
SLBR2
WE[3:0]
00000000
SLB[3:0]
16-bit write to address 0x0008
no change
write to
MR[9:8]
SLBR2
WE[3:0]
00001100
SLB[3:0]
16-bit write to address 0x2008
set lock bits
write to
MR[9:8]
SLBR3
WE[3:0]
0000
00
00
SLB[3:0]
Before write access
SLBR3
WE[3:0]
0000
00
11
SLB[3:0]
32-bit write to address 0x200C
set lock bits
write to
MR[15:12]
After
write access
To Next Page
Loading...
