4 Faults and alarms
4.2 List of faults and alarms
SINAMICS G130/G150
1702 List Manual (LH2), 07/2016, A5E03263479A
A30772 SI Motion P2: Test stop for fail-safe digital outputs running
Message value: -
Message class: Safety monitoring channel has identified an error (10)
Drive object: VECTOR_G
Component: None Propagation: GLOBAL
Reaction: NONE
Acknowledge: NONE
Cause: The forced checking procedure (test stop) for the fail-safe digital inputs is currently in progress.
Remedy: The alarm is automatically withdraw after successfully ending or canceling (when a fault condition occurs) the test
stop.
Note:
F-DO: Failsafe Digital Output
F30773 SI Motion P2: Test stop fail-safe digital output error
Message value: %1
Message class: Safety monitoring channel has identified an error (10)
Drive object: VECTOR_G
Component: None Propagation: GLOBAL
Reaction: NONE
Acknowledge: IMMEDIATELY (POWER ON)
Cause: A fault has occurred on processor 2 during the forced checking procedure (test stop) of the fail-safe digital output.
Fault value (r0949, interpret hexadecimal):
RRRVWXYZ hex:
R: Reserved.
V: Actual state of the DO channel concerned (see X) on processor 2 (corresponds to the states read back from the
hardware, bit 0 = DO 0, bit 1 = DO 1, etc.).
W: Required state of the DO channel concerned (see X, bit 0 = DO 0, bit 1 = DO 1, etc.).
X: DO channels involved, which indicate an error (bit 0 = DO 0, bit 1 = DO 1, etc.).
Y: Reason for the test stop fault.
Z: State of the test stop in which the fault has occurred.
Y: Reason for the test stop fault
Y = 1: Processor 1 in incorrect test stop state (internal fault).
Y = 2: Expected states of the DOs were not fulfilled (CU305: readback via DI 22 / CU240 readback DI 2).
Y = 3: Incorrect timer state on processor 1 (internal fault)
Y = 4: Expected states of the diag DOs were not fulfilled (CU305: internal readback on processor 2).
Y = 5: Expected states of the second diag DOs were not fulfilled (CU305: internal readback on processor 1).
X and V indicate the DI or Diag-DO state dependent upon the reason for the fault (2, 4 or 5).
In the event of multiple test stop faults, the first one that occurred is shown.
Z: Test stop state and associated test actions
Z = 0 ... 3: Synchronization phase of test stop between processor 1 and processor 2 no switching operations
Z = 4: DO + OFF and DO - OFF
Z = 5: Check to see if states are as expected
Z = 6: DO + ON and DO - ON
Z = 7: Check to see if states are as expected
Z = 8: DO + OFF and DO - ON
Z = 9: Check to see if states are as expected
Z = 10: DO + ON and DO - OFF
Z = 11: Check to see if states are as expected
Z = 12: DO + OFF and DO - OFF
Z = 13: Check to see if states are as expected
Z = 14: End of test stop
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