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R&S RTO6 User Manual

R&S RTO6
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Protocol analysis
R&S
®
RTO6
942User Manual 1801.6687.02 ─ 05
"Damping"
Sets the damping factor, which is only relevant for second order PLL.
Remote command:
BUS<m>:
CDR:PLL:ORDer
on page 2350
BUS<m>:CDR:PLL:BWIDth on page 2349
BUS<m>:CDR:PLL:RELBwidth on page 2350
BUS<m>:CDR:PLL:DAMPing on page 2350
Initial phase sync.
Defines the phase reference for the first clock edge.
"First sample"
The first clock edge matches the first sample of the waveform at the
left border of the display
.
"First data
edge"
The first clock edge matches the first edge of the data signal.
Remote command:
BUS<m>:CDR:SYNC
on page 2351
Selected results
The PLL requires some time to synchronize to the phase of the data stream. You can
select when the CDR algorithm returns clock edges:
"After initial
sync."
The clock edges of the synchronization time are discarded; results
are gathered after initial synchronization of the CDR. Thus, meaning-
ful TIE measurement results can be obtained.
"All"
All clock edges are used.
Remote command:
BUS<m>:CDR:RESults
on page 2350
Software CDRs
Couples the protocol CDR to the selected software CDR. For more information about it
see, Chapter 18.3, "Clock data recovery", on page 1112.
13.26.4 PCIe trigger
13.26.4.1 PCIe trigger settings
Access: [Bus] > "Shortcuts" tab > "Setup trigger"
PCIe (option R&S R
T
O6-K72)

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R&S RTO6 Specifications

General IconGeneral
BandwidthUp to 6 GHz
Sample RateUp to 20 Gsample/s
Memory DepthUp to 2 Gsample
ChannelsUp to 4
Vertical Sensitivity1 mV/div to 10 V/div
Vertical ResolutionUp to 16 bit
Trigger ModesEdge, Pulse
InterfaceLAN, USB, GPIB
Input Impedance50 Ω, 1 MΩ

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