R&S RTO6 User Manual

Remote control commands
R&S
®
RTO6
2351User Manual 1801.6687.02 ─ 05
Suffix:
<m>
.
1..4
Parameters:
<Results> ALL | AISYnc
*RST: ALL
BUS<m>:CDR:SYNC <InitialSync>
Defines the phase reference for the first clock edge.
Suffix:
<m>
.
1..4
Parameters:
<InitialSync> SAMPle | DATaedge
SAMPle
The first clock edge matches the first sample of the waveform at
the left border of the display.
DA
Taedge
The first clock edge matches the first edge of the data signal.
*RST: DATaedge
24.17.27.3 Trigger
The trigger suf
fix <m> is always 1 and can be omitted. It selects the trigger event: Only
the A-trigger is available for triggering on serial buses.
To trigger on a serial bus, make sure that:
●
TRIGger<m>:SOURce[:SELect] is set to SBUS.
●
The sources of the serial bus are channel signals: use BUS<m>:...:SOURce
commands.
●
Decoding is enabled: BUS<m>[:STATe] is set to ON.
TRIGger<m>:PCIE:DLLP:FCTL:CRET........................................................................... 2352
TRIGger<m>:PCIE:DLLP:FCTL:VCID............................................................................ 2352
TRIGger<m>:PCIE:DLLP:MULT:AUTH........................................................................... 2352
TRIGger<m>:PCIE:DLLP:MULT:CRET........................................................................... 2353
TRIGger<m>:PCIE:DLLP:MULT:DVPT........................................................................... 2353
TRIGger<m>:PCIE:DLLP:MULT:HABS........................................................................... 2353
TRIGger<m>:PCIE:DLLP:MULT:MIXT............................................................................ 2353
TRIGger<m>:PCIE:DLLP:MULT:PHAS........................................................................... 2353
TRIGger<m>:PCIE:DLLP:MULT:RESA........................................................................... 2353
TRIGger<m>:PCIE:DLLP:MULT:TLPT............................................................................2354
TRIGger<m>:PCIE:DLLP:MULT:TYPE........................................................................... 2354
TRIGger<m>:PCIE:DLLP:MULT:VHFC........................................................................... 2354
TRIGger<m>:PCIE:DLLP:MULT:VHGR...........................................................................2354
TRIGger<m>:PCIE:DLLP:MULT:VLNR........................................................................... 2355
TRIGger<m>:PCIE:DLLP:POWM...................................................................................2355
TRIGger<m>:PCIE:DLLP:SEQ...................................................................................... 2355
Protocols

R&S RTO6 Specifications

General

Bandwidth	Up to 6 GHz
Sample Rate	Up to 20 Gsample/s
Memory Depth	Up to 2 Gsample
Channels	Up to 4
Vertical Sensitivity	1 mV/div to 10 V/div
Vertical Resolution	Up to 16 bit
Trigger Modes	Edge, Pulse
Interface	LAN, USB, GPIB
Input Impedance	50 Ω, 1 MΩ