R&S RTO6 - Page 503

Protocol analysis
R&S
®
RTO6
503User Manual 1801.6687.02 ─ 05
"Data write Nack"
The addressed secondary does not accept the data.
"Data read Nack"
Marks the end of the read process when the primary reads data from
the secondary
. This Nack is sent according to the protocol definition,
it is not an error
.
Remote command:
TRIGger<m>:I2C:ADNack
on page 1680
TRIGger<m>:I2C:DWNack on page 1680
TRIGger<m>:I2C:DRNack on page 1680
Adress Type
Sets the address length to be triggered on: 7 bit, 7+1 bit, or 10 bit. Available settings
depend on the R/W bit setting of the bus configuration.
For "7 bit" and "10 bit", enter the address bits in the Address field, and use the "R/W
bit" on page 503 field to select the transfer direction.
For "7+1 bit", enter the seven address bits and also the R/W bit in the "Address" field.
If the trigger type is "Address + data", you can set the address type "Any" to trigger on
data only, regardless of the address.
Remote command:
TRIGger<m>:I2C:AMODe on page 1680
TRIGger<m>:I2C:ADOR<n>:ADRType on page 1682
Address
The trigger address setup consists of a comparison condition and one or two address
patterns.
Defines the bit pattern of the secondary device address. The length of the entry is
adjusted to the selected address type.
In binary format, use the following characters: 1; 0; or X (do not care). To enter the pat-
tern in other formats use the bit pattern editor, see Chapter 13.1.7, "Bit pattern editor",
on page 493.
"Condition"
Sets the comparison condition to a specific value or a range.
"Min"
Specifies the value or sets the start value of a range.
"Max"
Sets the maximum value of a range for "Condition" = "In range"/"Out
of range".
Remote command:
TRIGger<m>:
I2C:ADDRess
on page 1681
TRIGger<m>:I2C:ADDTo on page 1681
TRIGger<m>:I2C:ADOR<n>[:VALue] on page 1682
R/W bit
Toggles the trigger condition between read and write access of the primary. Select
"Either" if the transfer direction is not relevant for the trigger condition.
I²C (option R&S RT
O6-K510)