1/05
3-35
DocuColor 12/DCCS50
IQ 36 Unfused Copy RAP, IQ 37 Developer Bias
Image Quality
Reissue
IQ 36 Unfused Copy RAP
Unfused Image usually occurs because of lack of heat/pressure in the Fuser, or because of
excess toner on the copy.
Initial Actions
• Ensure that the correct Paper Mode (i.e Normal, Heavyweight or Extra Heavyweight) has
been selected for the paper being run.
• For electronic images, ensure that toner coverage has been limited to a total of less than
280% or less
than 70% each color.
Procedure
•Go to ADJ 8.1.1 Fuser Nip Adjustment. Nip width near the maximum (10.6 mm) will pro-
vide the best fusing.
• Ensure that output image density is not too high.
Compare the output image density to the
density of the original. If output density is too high, go to IQ 11 High Image Density RAP to
achieve the correct image density.
IQ 37 Developer Bias HVPS RAP
This RAP is used to isolate the cause of missing or out-of-specification voltages.
Procedure
WARNING
Electrical Shock Hazard. In the following procedure, high DC voltage circuits will be
tested. Use extreme caution when testing these circuits. Do not touch the multimeter or
the meter leads while testing the circuits.
Measure the Developer Bias out
put f
rom the DB HVPS:
• Switch off the copier.
• Connect the DMM (+) lead to the developer bias terminal that attaches to the developer
housing.
• C
heat the Front Door Interlock.
• Connect the DMM (-) lead to the copier frame.
• Set the DMM to measure 1 KVDC.
• Switch on the copier.
•Enter DC330 [09-076], press St
art and observe the voltage measurement.
There is a steady voltage of approximately -550 VDC at this point.
YN
Press St
op. Ent
er DC330 [09-077] and press Start. There is a steady voltage of
approximately 415 VAC at this point.
YN
Press St
op.
Connect the DMM (+) lead to the output terminal of the Developer Bias
HVPS. Press Start. There is approximately -550 VDC at this point.
YN
Press Stop. +24 VDC is measured at P
/J91-
1 on the Developer Bias HVPS.
YN
Go to F
lag 1 on BS
D9.3 and check the wiring for an open circuit.
(If two or more input signal are missing, -550 VDC and 415 VAC outputs will not
be present
.) Go to Flag 4 on BSD9.3and check the wiring for an open circuit. If
OK, replace the Developer Bias HVPS (PL 9.1). If the problem remains, replace
the IOT Drive PWB (PL 9.2).
Go to F
lag 3 B
SD9.3 and check the Developer Bias Lead for an open circuit.
Press Stop.
Enter dC330 [09-076] and press Start. Approximately +2.7 VDC is mea-
sured at J[418]-A9 on the IOT Drive PWB.
YN
Replace the IOT Drive PWB (PL
9.
2).
Approximately +2.7 VDC is measured at P/J91-5
on the Developer Bias HVPS.
YN
Go to F
lag 5 BS
D9.3 and check for an open circuit.
Replace the Developer Bias HVPS (PL 9.
1).
Press Stop. Enter DC330 [09-077] and press Start. There is a steady voltage of approxi-
mately 415 VAC at this point.
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