• Configuring Layer 3 Tunnel Services Interfaces on an MX Series Router with a DPC
• tunnel-services (Chassis) on page 1765
bits
Syntax bits {
priority number;
quality-level (prc | prs |sec | smc | ssu-a | ssu-b | st2 | st3 | st3e | st4 | stu | tnc);
request request (force-switch | lockout);
}
Hierarchy Level [edit chassis synchronization source]
Release Information Statement introduced in Junos OS Release 12.2 for ACX Series Routers.
Description Configure the external BITS device connected to the router’s T1 or E1 building-integrated
timing supply (BITS) interface, which upon configuration becomes a candidate for
selection as the clock source by the clock source selection algorithm.
NOTE: The bits option is not supported on the ACX1000 router.
Options The remaining statements are explained separately. See CLI Explorer.
Required Privilege
Level
interface—To view this statement in the configuration.
interface-control—To add this statement to the configuration.
Related
Documentation
• External Clock Synchronization Overview for ACX Series Routers on page 226
• Configuring External Clock Synchronization for ACX Series Routers on page 228
• Synchronous Ethernet Overview
• show chassis synchronization on page 2386
Copyright © 2017, Juniper Networks, Inc.1450
ACX Series Universal Access Router Configuration Guide