Infineon TRAVEO T2G - 15.25.7.6 GPIO_PRT_INTR

Technical Reference Manual 002-29852 Rev. *B
15.25.7.6 GPIO_PRT_INTR
Description:
Port interrupt status register
Address:
0x40310014
Offset:
0x14
Retention:
Retained
IsDeepSleep:
No
Comment:
An interrupt cause is cleared (set to '0') by writing a '1' to the corresponding bit field. It is not
recommended to write 0xFF to clear all interrupt causes, as a new interrupt cause may have
occurred between reading the register and clearing. Note that the pin interrupt provide
DeepSleep functionality (interrupt causes can be set to '1' and cause the system to wake up
from DeepSleep power mode). The IN.IN fields reflect the logical IO pin states at the time of
reading this register (same as the IN register).
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name EDGE7
[7:7]
EDGE6
[6:6]
EDGE5
[5:5]
EDGE4
[4:4]
EDGE3
[3:3]
EDGE2
[2:2]
EDGE1
[1:1]
EDGE0
[0:0]
Bits 15 14 13 12 11 10 9 8
Name None [15:9] FLT_EDGE
[8:8]
Bits 23 22 21 20 19 18 17 16
Name IN_IN7
[23:23]
IN_IN6
[22:22]
IN_IN5
[21:21]
IN_IN4
[20:20]
IN_IN3
[19:19]
IN_IN2
[18:18]
IN_IN1
[17:17]
IN_IN0
[16:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:25] FLT_IN_IN
[24:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0 EDGE0 RW1C A 0 Edge detect for IO pin 0
'0': No edge was detected on pin.
'1': An edge was detected on pin.
1 EDGE1 RW1C A 0 Edge detect for IO pin 1
2 EDGE2 RW1C A 0 Edge detect for IO pin 2
3 EDGE3 RW1C A 0 Edge detect for IO pin 3
4 EDGE4 RW1C A 0 Edge detect for IO pin 4
5 EDGE5 RW1C A 0 Edge detect for IO pin 5
6 EDGE6 RW1C A 0 Edge detect for IO pin 6
7 EDGE7 RW1C A 0 Edge detect for IO pin 7
8 FLT_EDGE RW1C A 0 Edge detected on filtered pin selected by
INTR_CFG.FLT_SEL
16 IN_IN0 R W 0 IO pin state for pin 0
17 IN_IN1 R W 0 IO pin state for pin 1
18 IN_IN2 R W 0 IO pin state for pin 2
19 IN_IN3 R W 0 IO pin state for pin 3
20 IN_IN4 R W 0 IO pin state for pin 4
21 IN_IN5 R W 0 IO pin state for pin 5
22 IN_IN6 R W 0 IO pin state for pin 6
23 IN_IN7 R W 0 IO pin state for pin 7
24 FLT_IN_IN R W 0 Filtered pin state for pin selected by
INTR_CFG.FLT_SEL
1001
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers