Infineon TRAVEO T2G - 23.9.26 SCB_RX_MATCH

Technical Reference Manual 002-29852 Rev. *B
23.9.26 SCB_RX_MATCH
Description:
Slave address and mask
Address:
0x40600310
Offset:
0x310
Retention:
Retained
IsDeepSleep:
No
Comment:
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name ADDR [7:0]
Bits 15 14 13 12 11 10 9 8
Name None [15:8]
Bits 23 22 21 20 19 18 17 16
Name MASK [23:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:7 ADDR RW R 0 Slave device address.
In UART multi-processor mode, all 8 bits are used.
In I2C slave mode, only bits 7 down to 1 are used. This
reflects the organization of the first transmitted byte in
a I2C transfer: the first 7 bits represent the address of
the addressed slave, and the last 1 bit is a read/write
indicator ('0': write, '1': read).
16:23 MASK RW R 0 Slave device address mask. This field is a mask that
specifies which of the slave address bits take part in
the matching. MATCH = ((ADDR & MASK) == ('slave
address' & MASK)).
1424
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers