Infineon TRAVEO T2G - 9.2.1 0; 9.2.1.1 CH_STRUCT 0; 9.2.1.2 CH_STRUCT 1; 9.2.1.3 CH_STRUCT 2

Technical Reference Manual 002-29852 Rev. *B
Slave Num
MMIO2 - 8
9.2.1 0
Register Name Address Permission Description
DW1_CTL0
0x40290000 FULL Control
DW1_STATUS0
0x40290004 FULL Status
DW1_ACT_DESCR_CTL0
0x40290020 FULL Active descriptor control
DW1_ACT_DESCR_SRC0
0x40290024 FULL Active descriptor source
DW1_ACT_DESCR_DST0
0x40290028 FULL Active descriptor destination
DW1_ACT_DESCR_X_CTL0
0x40290030 FULL Active descriptor X loop control
DW1_ACT_DESCR_Y_CTL0
0x40290034 FULL Active descriptor Y loop control
DW1_ACT_DESCR_NEXT_PTR0
0x40290038 FULL Active descriptor next pointer
DW1_ACT_SRC0
0x40290040 FULL Active source
DW1_ACT_DST0
0x40290044 FULL Active destination
DW1_ECC_CTL0
0x40290080 FULL ECC control
DW1_CRC_CTL0
0x40290100 FULL CRC control
DW1_CRC_DATA_CTL0
0x40290110 FULL CRC data control
DW1_CRC_POL_CTL0
0x40290120 FULL CRC polynomial control
DW1_CRC_LFSR_CTL0
0x40290130 FULL CRC LFSR control
DW1_CRC_REM_CTL0
0x40290140 FULL CRC remainder control
DW1_CRC_REM_RESULT0
0x40290148 FULL CRC remainder result
9.2.1.1 CH_STRUCT 0
Register Name Address Permission Description
DW1_CH_STRUCT0_CH_CTL
0x40298000 FULL Channel control
DW1_CH_STRUCT0_CH_STATUS
0x40298004 FULL Channel status
DW1_CH_STRUCT0_CH_IDX
0x40298008 FULL Channel current indices
DW1_CH_STRUCT0_CH_CURR_PTR
0x4029800C FULL Channel current descriptor pointer
DW1_CH_STRUCT0_INTR
0x40298010 FULL Interrupt
DW1_CH_STRUCT0_INTR_SET
0x40298014 FULL Interrupt set
DW1_CH_STRUCT0_INTR_MASK
0x40298018 FULL Interrupt mask
DW1_CH_STRUCT0_INTR_MASKED
0x4029801C FULL Interrupt masked
DW1_CH_STRUCT0_SRAM_DATA0
0x40298020 FULL SRAM data 0
DW1_CH_STRUCT0_SRAM_DATA1
0x40298024 FULL SRAM data 1
DW1_CH_STRUCT0_TR_CMD
0x40298028 FULL Channel software trigger
9.2.1.2 CH_STRUCT 1
Register Name Address Permission Description
DW1_CH_STRUCT1_CH_CTL
0x40298040 FULL Channel control
DW1_CH_STRUCT1_CH_STATUS
0x40298044 FULL Channel status
DW1_CH_STRUCT1_CH_IDX
0x40298048 FULL Channel current indices
DW1_CH_STRUCT1_CH_CURR_PTR
0x4029804C FULL Channel current descriptor pointer
DW1_CH_STRUCT1_INTR
0x40298050 FULL Interrupt
DW1_CH_STRUCT1_INTR_SET
0x40298054 FULL Interrupt set
DW1_CH_STRUCT1_INTR_MASK
0x40298058 FULL Interrupt mask
DW1_CH_STRUCT1_INTR_MASKED
0x4029805C FULL Interrupt masked
DW1_CH_STRUCT1_SRAM_DATA0
0x40298060 FULL SRAM data 0
DW1_CH_STRUCT1_SRAM_DATA1
0x40298064 FULL SRAM data 1
DW1_CH_STRUCT1_TR_CMD
0x40298068 FULL Channel software trigger
9.2.1.3 CH_STRUCT 2
Register Name Address Permission Description
DW1_CH_STRUCT2_CH_CTL
0x40298080 FULL Channel control
DW1_CH_STRUCT2_CH_STATUS
0x40298084 FULL Channel status
DW1_CH_STRUCT2_CH_IDX
0x40298088 FULL Channel current indices
DW1_CH_STRUCT2_CH_CURR_PTR
0x4029808C FULL Channel current descriptor pointer
DW1_CH_STRUCT2_INTR
0x40298090 FULL Interrupt
DW1_CH_STRUCT2_INTR_SET
0x40298094 FULL Interrupt set
DW1_CH_STRUCT2_INTR_MASK
0x40298098 FULL Interrupt mask
DW1_CH_STRUCT2_INTR_MASKED
0x4029809C FULL Interrupt masked
DW1_CH_STRUCT2_SRAM_DATA0
0x402980A0 FULL SRAM data 0
DW1_CH_STRUCT2_SRAM_DATA1
0x402980A4 FULL SRAM data 1
DW1_CH_STRUCT2_TR_CMD
0x402980A8 FULL Channel software trigger
848
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers