Technical Reference Manual 002-29852 Rev. *B
Register Name Address Permission Description
DW1_CH_STRUCT34_INTR_SET
0x40298894 FULL Interrupt set
DW1_CH_STRUCT34_INTR_MASK
0x40298898 FULL Interrupt mask
DW1_CH_STRUCT34_INTR_MASKED
0x4029889C FULL Interrupt masked
DW1_CH_STRUCT34_SRAM_DATA0
0x402988A0 FULL SRAM data 0
DW1_CH_STRUCT34_SRAM_DATA1
0x402988A4 FULL SRAM data 1
DW1_CH_STRUCT34_TR_CMD
0x402988A8 FULL Channel software trigger
9.2.1.36 CH_STRUCT 35
Register Name Address Permission Description
DW1_CH_STRUCT35_CH_CTL
0x402988C0 FULL Channel control
DW1_CH_STRUCT35_CH_STATUS
0x402988C4 FULL Channel status
DW1_CH_STRUCT35_CH_IDX
0x402988C8 FULL Channel current indices
DW1_CH_STRUCT35_CH_CURR_PTR
0x402988CC FULL Channel current descriptor pointer
DW1_CH_STRUCT35_INTR
0x402988D0 FULL Interrupt
DW1_CH_STRUCT35_INTR_SET
0x402988D4 FULL Interrupt set
DW1_CH_STRUCT35_INTR_MASK
0x402988D8 FULL Interrupt mask
DW1_CH_STRUCT35_INTR_MASKED
0x402988DC FULL Interrupt masked
DW1_CH_STRUCT35_SRAM_DATA0
0x402988E0 FULL SRAM data 0
DW1_CH_STRUCT35_SRAM_DATA1
0x402988E4 FULL SRAM data 1
DW1_CH_STRUCT35_TR_CMD
0x402988E8 FULL Channel software trigger
9.2.1.37 CH_STRUCT 36
Register Name Address Permission Description
DW1_CH_STRUCT36_CH_CTL
0x40298900 FULL Channel control
DW1_CH_STRUCT36_CH_STATUS
0x40298904 FULL Channel status
DW1_CH_STRUCT36_CH_IDX
0x40298908 FULL Channel current indices
DW1_CH_STRUCT36_CH_CURR_PTR
0x4029890C FULL Channel current descriptor pointer
DW1_CH_STRUCT36_INTR
0x40298910 FULL Interrupt
DW1_CH_STRUCT36_INTR_SET
0x40298914 FULL Interrupt set
DW1_CH_STRUCT36_INTR_MASK
0x40298918 FULL Interrupt mask
DW1_CH_STRUCT36_INTR_MASKED
0x4029891C FULL Interrupt masked
DW1_CH_STRUCT36_SRAM_DATA0
0x40298920 FULL SRAM data 0
DW1_CH_STRUCT36_SRAM_DATA1
0x40298924 FULL SRAM data 1
DW1_CH_STRUCT36_TR_CMD
0x40298928 FULL Channel software trigger
9.2.1.38 CH_STRUCT 37
Register Name Address Permission Description
DW1_CH_STRUCT37_CH_CTL
0x40298940 FULL Channel control
DW1_CH_STRUCT37_CH_STATUS
0x40298944 FULL Channel status
DW1_CH_STRUCT37_CH_IDX
0x40298948 FULL Channel current indices
DW1_CH_STRUCT37_CH_CURR_PTR
0x4029894C FULL Channel current descriptor pointer
DW1_CH_STRUCT37_INTR
0x40298950 FULL Interrupt
DW1_CH_STRUCT37_INTR_SET
0x40298954 FULL Interrupt set
DW1_CH_STRUCT37_INTR_MASK
0x40298958 FULL Interrupt mask
DW1_CH_STRUCT37_INTR_MASKED
0x4029895C FULL Interrupt masked
DW1_CH_STRUCT37_SRAM_DATA0
0x40298960 FULL SRAM data 0
DW1_CH_STRUCT37_SRAM_DATA1
0x40298964 FULL SRAM data 1
DW1_CH_STRUCT37_TR_CMD
0x40298968 FULL Channel software trigger
9.2.1.39 CH_STRUCT 38
Register Name Address Permission Description
DW1_CH_STRUCT38_CH_CTL
0x40298980 FULL Channel control
DW1_CH_STRUCT38_CH_STATUS
0x40298984 FULL Channel status
DW1_CH_STRUCT38_CH_IDX
0x40298988 FULL Channel current indices
DW1_CH_STRUCT38_CH_CURR_PTR
0x4029898C FULL Channel current descriptor pointer
DW1_CH_STRUCT38_INTR
0x40298990 FULL Interrupt
DW1_CH_STRUCT38_INTR_SET
0x40298994 FULL Interrupt set
DW1_CH_STRUCT38_INTR_MASK
0x40298998 FULL Interrupt mask
DW1_CH_STRUCT38_INTR_MASKED
0x4029899C FULL Interrupt masked
DW1_CH_STRUCT38_SRAM_DATA0
0x402989A0 FULL SRAM data 0
DW1_CH_STRUCT38_SRAM_DATA1
0x402989A4 FULL SRAM data 1
DW1_CH_STRUCT38_TR_CMD
0x402989A8 FULL Channel software trigger
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers