Technical Reference Manual 002-29852 Rev. *B
28.1.5 CNT 4
Register Name Address Permission Description
TCPWM0_GRP0_CNT4_CTRL
0x40380200 FULL Counter control register
Note:AUTO_RELOAD_LINE_SEL CC0_MATCH_UP_EN
CC0_MATCH_DOWN_EN CC1_MATCH_UP_EN
CC1_MATCH_DOWN_EN are not available for this
register
TCPWM0_GRP0_CNT4_STATUS
0x40380204 FULL Counter status register
Note:DT_CNT_H is not available for this register
TCPWM0_GRP0_CNT4_COUNTER
0x40380208 FULL Counter count register
TCPWM0_GRP0_CNT4_CC0
0x40380210 FULL Counter compare/capture 0 register
TCPWM0_GRP0_CNT4_CC0_BUFF
0x40380214 FULL Counter buffered compare/capture 0 register
TCPWM0_GRP0_CNT4_CC1
0x40380218 FULL Counter compare/capture 1 register
TCPWM0_GRP0_CNT4_CC1_BUFF
0x4038021C FULL Counter buffered compare/capture 1 register
TCPWM0_GRP0_CNT4_PERIOD
0x40380220 FULL Counter period register
TCPWM0_GRP0_CNT4_PERIOD_BUFF
0x40380224 FULL Counter buffered period register
TCPWM0_GRP0_CNT4_DT
0x40380230 FULL Counter PWM dead time register
Note:DT_LINE_OUT_H DT_LINE_COMPL_OUT are not
available for this register
TCPWM0_GRP0_CNT4_TR_CMD
0x40380240 FULL Counter trigger command register
TCPWM0_GRP0_CNT4_TR_IN_SEL0
0x40380244 FULL Counter input trigger selection register 0
TCPWM0_GRP0_CNT4_TR_IN_SEL1
0x40380248 FULL Counter input trigger selection register 1
TCPWM0_GRP0_CNT4_TR_IN_EDGE_SEL
0x4038024C FULL Counter input trigger edge selection register
TCPWM0_GRP0_CNT4_TR_PWM_CTRL
0x40380250 FULL Counter trigger PWM control register
TCPWM0_GRP0_CNT4_TR_OUT_SEL
0x40380254 FULL Counter output trigger selection register
TCPWM0_GRP0_CNT4_INTR
0x40380270 FULL Interrupt request register
TCPWM0_GRP0_CNT4_INTR_SET
0x40380274 FULL Interrupt set request register
TCPWM0_GRP0_CNT4_INTR_MASK
0x40380278 FULL Interrupt mask register
TCPWM0_GRP0_CNT4_INTR_MASKED
0x4038027C FULL Interrupt masked request register
28.1.6 CNT 5
Register Name Address Permission Description
TCPWM0_GRP0_CNT5_CTRL
0x40380280 FULL Counter control register
Note:AUTO_RELOAD_LINE_SEL CC0_MATCH_UP_EN
CC0_MATCH_DOWN_EN CC1_MATCH_UP_EN
CC1_MATCH_DOWN_EN are not available for this
register
TCPWM0_GRP0_CNT5_STATUS
0x40380284 FULL Counter status register
Note:DT_CNT_H is not available for this register
TCPWM0_GRP0_CNT5_COUNTER
0x40380288 FULL Counter count register
TCPWM0_GRP0_CNT5_CC0
0x40380290 FULL Counter compare/capture 0 register
TCPWM0_GRP0_CNT5_CC0_BUFF
0x40380294 FULL Counter buffered compare/capture 0 register
TCPWM0_GRP0_CNT5_CC1
0x40380298 FULL Counter compare/capture 1 register
TCPWM0_GRP0_CNT5_CC1_BUFF
0x4038029C FULL Counter buffered compare/capture 1 register
TCPWM0_GRP0_CNT5_PERIOD
0x403802A0 FULL Counter period register
TCPWM0_GRP0_CNT5_PERIOD_BUFF
0x403802A4 FULL Counter buffered period register
TCPWM0_GRP0_CNT5_DT
0x403802B0 FULL Counter PWM dead time register
Note:DT_LINE_OUT_H DT_LINE_COMPL_OUT are not
available for this register
TCPWM0_GRP0_CNT5_TR_CMD
0x403802C0 FULL Counter trigger command register
TCPWM0_GRP0_CNT5_TR_IN_SEL0
0x403802C4 FULL Counter input trigger selection register 0
TCPWM0_GRP0_CNT5_TR_IN_SEL1
0x403802C8 FULL Counter input trigger selection register 1
TCPWM0_GRP0_CNT5_TR_IN_EDGE_SEL
0x403802CC FULL Counter input trigger edge selection register
TCPWM0_GRP0_CNT5_TR_PWM_CTRL
0x403802D0 FULL Counter trigger PWM control register
TCPWM0_GRP0_CNT5_TR_OUT_SEL
0x403802D4 FULL Counter output trigger selection register
TCPWM0_GRP0_CNT5_INTR
0x403802F0 FULL Interrupt request register
TCPWM0_GRP0_CNT5_INTR_SET
0x403802F4 FULL Interrupt set request register
TCPWM0_GRP0_CNT5_INTR_MASK
0x403802F8 FULL Interrupt mask register
TCPWM0_GRP0_CNT5_INTR_MASKED
0x403802FC FULL Interrupt masked request register
28.1.7 CNT 6
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers