Infineon TRAVEO T2G - 9.2.1.40 CH_STRUCT 39; 9.2.1.41 CH_STRUCT 40; 9.2.1.42 CH_STRUCT 41; 9.2.1.43 CH_STRUCT 42

Technical Reference Manual 002-29852 Rev. *B
9.2.1.40 CH_STRUCT 39
Register Name Address Permission Description
DW1_CH_STRUCT39_CH_CTL
0x402989C0 FULL Channel control
DW1_CH_STRUCT39_CH_STATUS
0x402989C4 FULL Channel status
DW1_CH_STRUCT39_CH_IDX
0x402989C8 FULL Channel current indices
DW1_CH_STRUCT39_CH_CURR_PTR
0x402989CC FULL Channel current descriptor pointer
DW1_CH_STRUCT39_INTR
0x402989D0 FULL Interrupt
DW1_CH_STRUCT39_INTR_SET
0x402989D4 FULL Interrupt set
DW1_CH_STRUCT39_INTR_MASK
0x402989D8 FULL Interrupt mask
DW1_CH_STRUCT39_INTR_MASKED
0x402989DC FULL Interrupt masked
DW1_CH_STRUCT39_SRAM_DATA0
0x402989E0 FULL SRAM data 0
DW1_CH_STRUCT39_SRAM_DATA1
0x402989E4 FULL SRAM data 1
DW1_CH_STRUCT39_TR_CMD
0x402989E8 FULL Channel software trigger
9.2.1.41 CH_STRUCT 40
Register Name Address Permission Description
DW1_CH_STRUCT40_CH_CTL
0x40298A00 FULL Channel control
DW1_CH_STRUCT40_CH_STATUS
0x40298A04 FULL Channel status
DW1_CH_STRUCT40_CH_IDX
0x40298A08 FULL Channel current indices
DW1_CH_STRUCT40_CH_CURR_PTR
0x40298A0C FULL Channel current descriptor pointer
DW1_CH_STRUCT40_INTR
0x40298A10 FULL Interrupt
DW1_CH_STRUCT40_INTR_SET
0x40298A14 FULL Interrupt set
DW1_CH_STRUCT40_INTR_MASK
0x40298A18 FULL Interrupt mask
DW1_CH_STRUCT40_INTR_MASKED
0x40298A1C FULL Interrupt masked
DW1_CH_STRUCT40_SRAM_DATA0
0x40298A20 FULL SRAM data 0
DW1_CH_STRUCT40_SRAM_DATA1
0x40298A24 FULL SRAM data 1
DW1_CH_STRUCT40_TR_CMD
0x40298A28 FULL Channel software trigger
9.2.1.42 CH_STRUCT 41
Register Name Address Permission Description
DW1_CH_STRUCT41_CH_CTL
0x40298A40 FULL Channel control
DW1_CH_STRUCT41_CH_STATUS
0x40298A44 FULL Channel status
DW1_CH_STRUCT41_CH_IDX
0x40298A48 FULL Channel current indices
DW1_CH_STRUCT41_CH_CURR_PTR
0x40298A4C FULL Channel current descriptor pointer
DW1_CH_STRUCT41_INTR
0x40298A50 FULL Interrupt
DW1_CH_STRUCT41_INTR_SET
0x40298A54 FULL Interrupt set
DW1_CH_STRUCT41_INTR_MASK
0x40298A58 FULL Interrupt mask
DW1_CH_STRUCT41_INTR_MASKED
0x40298A5C FULL Interrupt masked
DW1_CH_STRUCT41_SRAM_DATA0
0x40298A60 FULL SRAM data 0
DW1_CH_STRUCT41_SRAM_DATA1
0x40298A64 FULL SRAM data 1
DW1_CH_STRUCT41_TR_CMD
0x40298A68 FULL Channel software trigger
9.2.1.43 CH_STRUCT 42
Register Name Address Permission Description
DW1_CH_STRUCT42_CH_CTL
0x40298A80 FULL Channel control
DW1_CH_STRUCT42_CH_STATUS
0x40298A84 FULL Channel status
DW1_CH_STRUCT42_CH_IDX
0x40298A88 FULL Channel current indices
DW1_CH_STRUCT42_CH_CURR_PTR
0x40298A8C FULL Channel current descriptor pointer
DW1_CH_STRUCT42_INTR
0x40298A90 FULL Interrupt
DW1_CH_STRUCT42_INTR_SET
0x40298A94 FULL Interrupt set
DW1_CH_STRUCT42_INTR_MASK
0x40298A98 FULL Interrupt mask
DW1_CH_STRUCT42_INTR_MASKED
0x40298A9C FULL Interrupt masked
DW1_CH_STRUCT42_SRAM_DATA0
0x40298AA0 FULL SRAM data 0
DW1_CH_STRUCT42_SRAM_DATA1
0x40298AA4 FULL SRAM data 1
DW1_CH_STRUCT42_TR_CMD
0x40298AA8 FULL Channel software trigger
9.2.1.44 CH_STRUCT 43
Register Name Address Permission Description
DW1_CH_STRUCT43_CH_CTL
0x40298AC0 FULL Channel control
DW1_CH_STRUCT43_CH_STATUS
0x40298AC4 FULL Channel status
DW1_CH_STRUCT43_CH_IDX
0x40298AC8 FULL Channel current indices
DW1_CH_STRUCT43_CH_CURR_PTR
0x40298ACC FULL Channel current descriptor pointer
DW1_CH_STRUCT43_INTR
0x40298AD0 FULL Interrupt
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2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers