Technical Reference Manual 002-29852 Rev. *B
18.13.3.6 LIN_CH_PID_CHECKSUM
Description:
PID and checksum
Address:
0x40508080
Offset:
0x80
Retention:
Retained
IsDeepSleep:
No
Comment:
This register supports 8-bit, 16-bit and 32-bit accesses.
A LIN header has a single PID field. This field is SW accessible through this register. The field
is used in BOTH transmit and receive modes.
A LIN response has a single checksum field. This field is SW accessible through this register.
The field is used in BOTH transmit and receive modes.
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name PID [7:0]
Bits 15 14 13 12 11 10 9 8
Name CHECKSUM [15:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:7 PID RW RW Undefined Header protected identifier (PID).
- Bits 5 down to 0: frame identifier ID[5:0].
Frame identifier 0x3c is for a 'master request' frame,
0x3d is for a 'slave response' frame, 0x3e and 0x3f are
for future LIN enhancements. Frame identifier ID[5:4]
is optionally used for length control; i.e. specifies the
number of response data fields.
- Bits 1 down to 0: parity bits P[1] and P[0].
- P[1] = ! (ID[5] ^ ID[4] ^ ID[3] ^ ID[1])
- P[0] = (ID[4] ^ ID[2] ^ ID[1] ^ ID[0])
Transmission: To be transmitted PID field. SW needs
to calculate the PID field parity bits P[1] and P[0].
Reception: Received PID field. Slave node SW uses
the PID field to determine how to handle the response
for a received frame header: TX_RESPONSE or
RX_RESPONSE.
8:15 CHECKSUM R RW Undefined Checksum.
Transmission: HW calculated checksum (SW does not
need to calculate the checksum) over the transmitted
PID field (optional per CTL.CHECKSUM_ENHANCED)
and data fields.
Reception: Received checksum. Note that in case of a
RX_CHECKSUM_ERROR, SW can use the received
PID field and the received data fields to calculate the
correct checksum value.
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers
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