Infineon TRAVEO T2G - 3.8.7.2 CM0 P_MTB_MASTER

Technical Reference Manual 002-29852 Rev. *B
3.8.7.2 CM0P_MTB_MASTER
Description:
MASTER register
Address:
0xF0003004
Offset:
0x4
Retention:
Retained
IsDeepSleep:
No
Comment:
Contains:
- The main trace enable bit.
- Other trace control fields.
Usage constraints - Before the MASTER.EN or MASTER.TSTARTEN bits are set to 1,
software must initialize the POSITION and FLOW registers.
- If the FLOW.WATERMARK field is used to stop tracing or to halt the processor, the
MASTER.MASK field must still be set to a value that prevents the POSITION.POINTER field
from wrapping before it reaches the FLOW.WATERMARK value.
- The EDBGRQ output value is also affected by the Debug authentication interface.
Configurations: Available in all MTB configurations.
Attributes:
- You can modify all fields by software.
- Automatic hardware mechanisms update the EN and HALTREQ bits.
Following example MASK and POINTER values to illustrate the effect of the
MASK field on the POINTER.
MASK POINTER POINTER + 1 POINTER next
0x0 0x1 0x2 0x0
0x0 0x5 0x6 0x4
0x3 0xF 0x10 0x0
0x3 0x1F 0x20 0x10
Default:
0x80
Bit-field Table
Bits
7 6 5 4 3 2 1 0
Name SFRWPRIV
[7:7]
TSTOPEN
[6:6]
TSTARTEN
[5:5]
MASK [4:0]
Bits 15 14 13 12 11 10 9 8
Name None [15:10] HALTREQ
[9:9]
RAMPRIV
[8:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:16]
Bits 31 30 29 28 27 26 25 24
Name EN [31:31] None [30:24]
Bit-fields
273
2022-04-18
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