Technical Reference Manual 002-29852 Rev. *B
17.17.1.2 IPC_STRUCT_RELEASE
Description:
IPC release
Address:
0x40220004
Offset:
0x4
Retention:
Retained
IsDeepSleep:
No
Comment:
This register is used to release a lock.
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name INTR_RELEASE [7:0]
Bits 15 14 13 12 11 10 9 8
Name INTR_RELEASE [15:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:15 INTR_RELEASE W 0 Writing this field releases a lock and allows for the
generation of release events to the IPC interrupt
structures, but only when the lock is acquired
(LOCK_STATUS.ACQUIRED is '1'). The IPC release
cause fields associated with this IPC structure are set
to '1', but only for those IPC interrupt structures for
which the corresponding bit field in INTR_RELEASE[]
is set to '1'.
SW writes a '1' to the bit fields to generate a release
event. Due to the transient nature of this event, SW
always reads a '0' from this field.
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers
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