Infineon TRAVEO T2G - 3.8.3.4 CM0 P_SCS_SYST_CALIB

Technical Reference Manual 002-29852 Rev. *B
3.8.3.4 CM0P_SCS_SYST_CALIB
Description:
SysTick Calibration Value
Address:
0xE000E01C
Offset:
0x1C
Retention:
Retained
IsDeepSleep:
No
Comment:
Reads the calibration value and parameters for SysTick.
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name TENMS [7:0]
Bits 15 14 13 12 11 10 9 8
Name TENMS [15:8]
Bits 23 22 21 20 19 18 17 16
Name TENMS [23:16]
Bits 31 30 29 28 27 26 25 24
Name NOREF
[31:31]
SKEW
[30:30]
None [29:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
0:23 TENMS R RW X Optionally, holds a reload value to be used for 10ms
(100Hz) timing, subject to system clock skew errors. If
this field is '0', the calibration value is not known.
This field is controlled by
CPUSS_SYSTICK_CTL.TENMS field.
30 SKEW R RW X Indicates whether the 10ms calibration value is exact:
'0': 10ms calibration value is exact.
'1': 10ms calibration value is inexact, because of the
clock frequency.
This field is controlled by
CPUSS_SYSTICK_CTL.SKEW field.
31 NOREF R 0 Indicates whether a implementation defined reference
clock is provided:
'0': the reference clock is provided.
'1': the reference clock is not provided.
When this bit is '1', the SYST_CSR.CLKSOURCEis
forced to '1' and cannot be cleared to '0'.
This field is controlled by
CPUSS_SYSTICK_CTL.NOREF field.
165
2022-04-18
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers