Technical Reference Manual 002-29852 Rev. *B
23.9.7 SCB_SPI_TX_CTRL
Description:
SPI transmitter control
Address:
0x40600028
Offset:
0x28
Retention:
Retained
IsDeepSleep:
No
Comment:
Only applies in SPI MOTOROLA submode, internally clocked SPI operation.
Default:
0x0
Bit-field Table
Bits 7 6 5 4 3 2 1 0
Name None [7:6] PARITY
_ENABLED
[5:5]
PARITY
[4:4]
None [3:0]
Bits 15 14 13 12 11 10 9 8
Name None [15:8]
Bits 23 22 21 20 19 18 17 16
Name None [23:16]
Bits 31 30 29 28 27 26 25 24
Name None [31:24]
Bit-fields
Bits Name SW HW Default or
Enum
Description
4 PARITY RW R 0 Parity bit. When '0', the transmitter generates an even
parity. When '1', the transmitter generates an odd
parity.
5 PARITY_ENABLED RW R 0 Parity generation enabled ('1') or not ('0').
TRAVEO™ T2G Automotive MCU: TVII-B-E-4M body controller entry registers